diff --git a/PCB/alternative_PCB/ESLCONN.bak b/PCB/alternative_PCB/ESLCONN.bak
new file mode 100644
index 00000000..ca021399
--- /dev/null
+++ b/PCB/alternative_PCB/ESLCONN.bak
@@ -0,0 +1,2 @@
+(kicad_symbol_lib (version 20211014) (generator kicad_symbol_editor)
+)
diff --git a/PCB/alternative_PCB/ESLCONN.kicad_sym b/PCB/alternative_PCB/ESLCONN.kicad_sym
new file mode 100644
index 00000000..bbdd43c7
--- /dev/null
+++ b/PCB/alternative_PCB/ESLCONN.kicad_sym
@@ -0,0 +1,64 @@
+(kicad_symbol_lib (version 20211014) (generator kicad_symbol_editor)
+ (symbol "ESL-connector" (in_bom yes) (on_board yes)
+ (property "Reference" "U" (id 0) (at 0 11.43 0)
+ (effects (font (size 1.27 1.27)))
+ )
+ (property "Value" "ESL-connector" (id 1) (at 0 -11.43 0)
+ (effects (font (size 1.27 1.27)))
+ )
+ (property "Footprint" "" (id 2) (at 0 0 0)
+ (effects (font (size 1.27 1.27)) hide)
+ )
+ (property "Datasheet" "" (id 3) (at 0 0 0)
+ (effects (font (size 1.27 1.27)) hide)
+ )
+ (symbol "ESL-connector_0_1"
+ (rectangle (start -6.35 10.16) (end 6.35 -10.16)
+ (stroke (width 0.1524) (type default) (color 0 0 0 0))
+ (fill (type none))
+ )
+ )
+ (symbol "ESL-connector_1_1"
+ (pin power_in line (at -8.89 7.62 0) (length 2.54)
+ (name "VCC" (effects (font (size 1.27 1.27))))
+ (number "1" (effects (font (size 1.27 1.27))))
+ )
+ (pin bidirectional line (at 8.89 -7.62 180) (length 2.54)
+ (name "P1.0" (effects (font (size 1.27 1.27))))
+ (number "10" (effects (font (size 1.27 1.27))))
+ )
+ (pin input line (at -8.89 3.81 0) (length 2.54)
+ (name "MoSi" (effects (font (size 1.27 1.27))))
+ (number "2" (effects (font (size 1.27 1.27))))
+ )
+ (pin input line (at -8.89 0 0) (length 2.54)
+ (name "SS" (effects (font (size 1.27 1.27))))
+ (number "3" (effects (font (size 1.27 1.27))))
+ )
+ (pin output line (at -8.89 -3.81 0) (length 2.54)
+ (name "TXD" (effects (font (size 1.27 1.27))))
+ (number "4" (effects (font (size 1.27 1.27))))
+ )
+ (pin input line (at -8.89 -7.62 0) (length 2.54)
+ (name "CLK" (effects (font (size 1.27 1.27))))
+ (number "5" (effects (font (size 1.27 1.27))))
+ )
+ (pin output line (at 8.89 7.62 180) (length 2.54)
+ (name "MiSo" (effects (font (size 1.27 1.27))))
+ (number "6" (effects (font (size 1.27 1.27))))
+ )
+ (pin power_in line (at 8.89 3.81 180) (length 2.54)
+ (name "GND" (effects (font (size 1.27 1.27))))
+ (number "7" (effects (font (size 1.27 1.27))))
+ )
+ (pin input line (at 8.89 0 180) (length 2.54)
+ (name "RST" (effects (font (size 1.27 1.27))))
+ (number "8" (effects (font (size 1.27 1.27))))
+ )
+ (pin input line (at 8.89 -3.81 180) (length 2.54)
+ (name "RXD" (effects (font (size 1.27 1.27))))
+ (number "9" (effects (font (size 1.27 1.27))))
+ )
+ )
+ )
+)
diff --git a/PCB/alternative_PCB/esl.pretty/SOLUM_ZBS_DEBUG.kicad_mod b/PCB/alternative_PCB/esl.pretty/SOLUM_ZBS_DEBUG.kicad_mod
new file mode 100644
index 00000000..c6e9436d
--- /dev/null
+++ b/PCB/alternative_PCB/esl.pretty/SOLUM_ZBS_DEBUG.kicad_mod
@@ -0,0 +1,40 @@
+(footprint "SOLUM_ZBS_DEBUG" (version 20211014) (generator pcbnew)
+ (layer "F.Cu")
+ (tedit 0)
+ (descr "Solum Debug header pinout for 1mm pogo pins
")
+ (fp_text reference "J19" (at 0 0) (layer "F.SilkS") hide
+ (effects (font (size 1.27 1.27) (thickness 0.15)))
+ (tstamp 82ec8fc7-4947-43e8-a28a-f87f8d8a424a)
+ )
+ (fp_text value "" (at 0 0) (layer "F.Fab") hide
+ (effects (font (size 1.27 1.27) (thickness 0.15)))
+ (tstamp 9be777ad-9f8e-434c-9925-b4f3cbcf667d)
+ )
+ (fp_line (start -3.745 -2.506) (end -3.745 2.494) (layer "F.SilkS") (width 0.127) (tstamp 230f73ed-7388-4311-bd67-896af89b3fcb))
+ (fp_line (start -3.345 0.044) (end -2.745 -0.356) (layer "F.SilkS") (width 0.127) (tstamp 25b0ffe5-9f43-42b5-ad90-4a164f170e55))
+ (fp_line (start 3.755 -2.506) (end 3.755 2.494) (layer "F.SilkS") (width 0.127) (tstamp 53faed3a-63cc-4487-8883-b5c4197265c2))
+ (fp_line (start -3.345 0.044) (end -2.745 0.444) (layer "F.SilkS") (width 0.127) (tstamp 5a223cb8-3c61-4d1f-a412-d9c7d77f66b9))
+ (fp_line (start -3.745 -2.506) (end 3.755 -2.506) (layer "F.SilkS") (width 0.127) (tstamp 85c102fc-8b65-4d83-a6fe-e043723d82a4))
+ (fp_line (start -3.745 2.494) (end 3.755 2.494) (layer "F.SilkS") (width 0.127) (tstamp a1645c22-11d6-485a-92a9-3621b643513c))
+ (fp_line (start -3.345 0.044) (end -1.495 0.044) (layer "F.SilkS") (width 0.127) (tstamp dab4d2de-3395-4723-9799-d0bb3a191c1b))
+ (pad "1" thru_hole circle (at -2.995 1.744) (size 1.27 1.27) (drill 1) (layers *.Cu *.Mask)
+ (solder_mask_margin 0.0508) (tstamp 71343d1a-b887-4c75-8f6e-3783c4cee9df))
+ (pad "2" thru_hole circle (at -0.995 1.744) (size 1.27 1.27) (drill 1) (layers *.Cu *.Mask)
+ (solder_mask_margin 0.0508) (tstamp a5bba08a-0aac-4518-8a18-8e86b2e9784c))
+ (pad "3" thru_hole circle (at 1.005 1.744) (size 1.27 1.27) (drill 1) (layers *.Cu *.Mask)
+ (solder_mask_margin 0.0508) (tstamp 64903969-f443-47c1-a03d-9412f3950a7f))
+ (pad "4" thru_hole circle (at 3.005 1.794) (size 1.27 1.27) (drill 1) (layers *.Cu *.Mask)
+ (solder_mask_margin 0.0508) (tstamp 53ec6283-c57d-491a-9c98-1df814704014))
+ (pad "5" thru_hole circle (at 0.005 -0.006) (size 1.27 1.27) (drill 1) (layers *.Cu *.Mask)
+ (solder_mask_margin 0.0508) (tstamp 6b11af81-f064-49d0-8c15-50a5af3bdce8))
+ (pad "6" thru_hole circle (at 2.005 -0.006) (size 1.27 1.27) (drill 1) (layers *.Cu *.Mask)
+ (solder_mask_margin 0.0508) (tstamp 048099e4-1d18-4e68-a98e-c376a592cc1d))
+ (pad "7" thru_hole circle (at -2.995 -1.756) (size 1.27 1.27) (drill 1) (layers *.Cu *.Mask)
+ (solder_mask_margin 0.0508) (tstamp 323c1c33-7532-46f9-b99c-f77f2344710a))
+ (pad "8" thru_hole circle (at -0.995 -1.756) (size 1.27 1.27) (drill 1) (layers *.Cu *.Mask)
+ (solder_mask_margin 0.0508) (tstamp e067c309-8b30-4efa-b5e6-088c3f57692f))
+ (pad "9" thru_hole circle (at 1.005 -1.756) (size 1.27 1.27) (drill 1) (layers *.Cu *.Mask)
+ (solder_mask_margin 0.0508) (tstamp f4cd57db-f82c-479a-9526-cfebc536273b))
+ (pad "10" thru_hole circle (at 3.005 -1.756) (size 1.27 1.27) (drill 1) (layers *.Cu *.Mask)
+ (solder_mask_margin 0.0508) (tstamp 2700ab94-06e0-45e2-9edc-3815ba09c9d6))
+)
diff --git a/PCB/alternative_PCB/fp-lib-table b/PCB/alternative_PCB/fp-lib-table
new file mode 100644
index 00000000..655322b2
--- /dev/null
+++ b/PCB/alternative_PCB/fp-lib-table
@@ -0,0 +1,3 @@
+(fp_lib_table
+ (lib (name "esl")(type "KiCad")(uri "${KIPRJMOD}/esl.pretty")(options "")(descr ""))
+)
diff --git a/PCB/alternative_PCB/gerber.zip b/PCB/alternative_PCB/gerber.zip
new file mode 100644
index 00000000..66134a38
Binary files /dev/null and b/PCB/alternative_PCB/gerber.zip differ
diff --git a/PCB/alternative_PCB/gerber/jig2-B_Cu.gbl b/PCB/alternative_PCB/gerber/jig2-B_Cu.gbl
new file mode 100644
index 00000000..78fb6664
--- /dev/null
+++ b/PCB/alternative_PCB/gerber/jig2-B_Cu.gbl
@@ -0,0 +1,252 @@
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+%FSLAX46Y46*%
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+G04 #@! TA.AperFunction,Conductor*
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+G04 #@! TD*
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diff --git a/PCB/alternative_PCB/gerber/jig2-B_Mask.gbs b/PCB/alternative_PCB/gerber/jig2-B_Mask.gbs
new file mode 100644
index 00000000..11a691e0
--- /dev/null
+++ b/PCB/alternative_PCB/gerber/jig2-B_Mask.gbs
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diff --git a/PCB/alternative_PCB/gerber/jig2-B_Paste.gbp b/PCB/alternative_PCB/gerber/jig2-B_Paste.gbp
new file mode 100644
index 00000000..43b9792c
--- /dev/null
+++ b/PCB/alternative_PCB/gerber/jig2-B_Paste.gbp
@@ -0,0 +1,15 @@
+G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,(6.0.11)*
+G04 #@! TF.CreationDate,2023-03-04T17:24:57+01:00*
+G04 #@! TF.ProjectId,jig2,6a696732-2e6b-4696-9361-645f70636258,rev?*
+G04 #@! TF.SameCoordinates,Original*
+G04 #@! TF.FileFunction,Paste,Bot*
+G04 #@! TF.FilePolarity,Positive*
+%FSLAX46Y46*%
+G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
+G04 Created by KiCad (PCBNEW (6.0.11)) date 2023-03-04 17:24:57*
+%MOMM*%
+%LPD*%
+G01*
+G04 APERTURE LIST*
+G04 APERTURE END LIST*
+M02*
diff --git a/PCB/alternative_PCB/gerber/jig2-B_Silkscreen.gbo b/PCB/alternative_PCB/gerber/jig2-B_Silkscreen.gbo
new file mode 100644
index 00000000..d2a8ff93
--- /dev/null
+++ b/PCB/alternative_PCB/gerber/jig2-B_Silkscreen.gbo
@@ -0,0 +1,153 @@
+G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,(6.0.11)*
+G04 #@! TF.CreationDate,2023-03-04T17:24:57+01:00*
+G04 #@! TF.ProjectId,jig2,6a696732-2e6b-4696-9361-645f70636258,rev?*
+G04 #@! TF.SameCoordinates,Original*
+G04 #@! TF.FileFunction,Legend,Bot*
+G04 #@! TF.FilePolarity,Positive*
+%FSLAX46Y46*%
+G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
+G04 Created by KiCad (PCBNEW (6.0.11)) date 2023-03-04 17:24:57*
+%MOMM*%
+%LPD*%
+G01*
+G04 APERTURE LIST*
+%ADD10C,0.150000*%
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diff --git a/PCB/alternative_PCB/gerber/jig2-Edge_Cuts.gm1 b/PCB/alternative_PCB/gerber/jig2-Edge_Cuts.gm1
new file mode 100644
index 00000000..035367a8
--- /dev/null
+++ b/PCB/alternative_PCB/gerber/jig2-Edge_Cuts.gm1
@@ -0,0 +1,26 @@
+G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,(6.0.11)*
+G04 #@! TF.CreationDate,2023-03-04T17:24:57+01:00*
+G04 #@! TF.ProjectId,jig2,6a696732-2e6b-4696-9361-645f70636258,rev?*
+G04 #@! TF.SameCoordinates,Original*
+G04 #@! TF.FileFunction,Profile,NP*
+%FSLAX46Y46*%
+G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
+G04 Created by KiCad (PCBNEW (6.0.11)) date 2023-03-04 17:24:57*
+%MOMM*%
+%LPD*%
+G01*
+G04 APERTURE LIST*
+G04 #@! TA.AperFunction,Profile*
+%ADD10C,0.100000*%
+G04 #@! TD*
+G04 APERTURE END LIST*
+D10*
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diff --git a/PCB/alternative_PCB/gerber/jig2-F_Cu.gtl b/PCB/alternative_PCB/gerber/jig2-F_Cu.gtl
new file mode 100644
index 00000000..6c6a01e2
--- /dev/null
+++ b/PCB/alternative_PCB/gerber/jig2-F_Cu.gtl
@@ -0,0 +1,528 @@
+G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,(6.0.11)*
+G04 #@! TF.CreationDate,2023-03-04T17:24:56+01:00*
+G04 #@! TF.ProjectId,jig2,6a696732-2e6b-4696-9361-645f70636258,rev?*
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+G04 #@! TF.FileFunction,Copper,L1,Top*
+G04 #@! TF.FilePolarity,Positive*
+%FSLAX46Y46*%
+G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
+G04 Created by KiCad (PCBNEW (6.0.11)) date 2023-03-04 17:24:56*
+%MOMM*%
+%LPD*%
+G01*
+G04 APERTURE LIST*
+G04 Aperture macros list*
+%AMRoundRect*
+0 Rectangle with rounded corners*
+0 $1 Rounding radius*
+0 $2 $3 $4 $5 $6 $7 $8 $9 X,Y pos of 4 corners*
+0 Add a 4 corners polygon primitive as box body*
+4,1,4,$2,$3,$4,$5,$6,$7,$8,$9,$2,$3,0*
+0 Add four circle primitives for the rounded corners*
+1,1,$1+$1,$2,$3*
+1,1,$1+$1,$4,$5*
+1,1,$1+$1,$6,$7*
+1,1,$1+$1,$8,$9*
+0 Add four rect primitives between the rounded corners*
+20,1,$1+$1,$2,$3,$4,$5,0*
+20,1,$1+$1,$4,$5,$6,$7,0*
+20,1,$1+$1,$6,$7,$8,$9,0*
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+G04 Aperture macros list end*
+G04 #@! TA.AperFunction,SMDPad,CuDef*
+%ADD10FreePoly0,180.000000*%
+G04 #@! TD*
+G04 #@! TA.AperFunction,SMDPad,CuDef*
+%ADD11FreePoly1,180.000000*%
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+G04 #@! TA.AperFunction,SMDPad,CuDef*
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+G04 #@! TA.AperFunction,ComponentPad*
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+G04 #@! TA.AperFunction,SMDPad,CuDef*
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diff --git a/PCB/alternative_PCB/gerber/jig2-F_Mask.gts b/PCB/alternative_PCB/gerber/jig2-F_Mask.gts
new file mode 100644
index 00000000..0d1e992e
--- /dev/null
+++ b/PCB/alternative_PCB/gerber/jig2-F_Mask.gts
@@ -0,0 +1,178 @@
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+G04 Aperture macros list*
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diff --git a/PCB/alternative_PCB/gerber/jig2-F_Paste.gtp b/PCB/alternative_PCB/gerber/jig2-F_Paste.gtp
new file mode 100644
index 00000000..d7b0c314
--- /dev/null
+++ b/PCB/alternative_PCB/gerber/jig2-F_Paste.gtp
@@ -0,0 +1,173 @@
+G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,(6.0.11)*
+G04 #@! TF.CreationDate,2023-03-04T17:24:57+01:00*
+G04 #@! TF.ProjectId,jig2,6a696732-2e6b-4696-9361-645f70636258,rev?*
+G04 #@! TF.SameCoordinates,Original*
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+%FSLAX46Y46*%
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+%MOMM*%
+%LPD*%
+G01*
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+G04 Aperture macros list*
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+0 $1 Rounding radius*
+0 $2 $3 $4 $5 $6 $7 $8 $9 X,Y pos of 4 corners*
+0 Add a 4 corners polygon primitive as box body*
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+G04 Aperture macros list end*
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diff --git a/PCB/alternative_PCB/gerber/jig2-F_Silkscreen.gto b/PCB/alternative_PCB/gerber/jig2-F_Silkscreen.gto
new file mode 100644
index 00000000..ca124ecc
--- /dev/null
+++ b/PCB/alternative_PCB/gerber/jig2-F_Silkscreen.gto
@@ -0,0 +1,1119 @@
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diff --git a/PCB/alternative_PCB/gerber/jig2-PTH.drl b/PCB/alternative_PCB/gerber/jig2-PTH.drl
new file mode 100644
index 00000000..b7e8898d
--- /dev/null
+++ b/PCB/alternative_PCB/gerber/jig2-PTH.drl
@@ -0,0 +1,101 @@
+M48
+; DRILL file {KiCad (6.0.11)} date Sa 04 Mär 2023 17:25:31 CET
+; FORMAT={-:-/ absolute / metric / decimal}
+; #@! TF.CreationDate,2023-03-04T17:25:31+01:00
+; #@! TF.GenerationSoftware,Kicad,Pcbnew,(6.0.11)
+; #@! TF.FileFunction,Plated,1,2,PTH
+FMAT,2
+METRIC
+; #@! TA.AperFunction,Plated,PTH,ViaDrill
+T1C0.400
+; #@! TA.AperFunction,Plated,PTH,ComponentDrill
+T2C0.900
+; #@! TA.AperFunction,Plated,PTH,ComponentDrill
+T3C1.000
+; #@! TA.AperFunction,Plated,PTH,ComponentDrill
+T4C1.100
+%
+G90
+G05
+T1
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+T0
+M30
diff --git a/PCB/alternative_PCB/jig2.kicad_pcb b/PCB/alternative_PCB/jig2.kicad_pcb
new file mode 100644
index 00000000..29a0b10a
--- /dev/null
+++ b/PCB/alternative_PCB/jig2.kicad_pcb
@@ -0,0 +1,1471 @@
+(kicad_pcb (version 20211014) (generator pcbnew)
+
+ (general
+ (thickness 1.6)
+ )
+
+ (paper "A4")
+ (layers
+ (0 "F.Cu" signal)
+ (31 "B.Cu" signal)
+ (32 "B.Adhes" user "B.Adhesive")
+ (33 "F.Adhes" user "F.Adhesive")
+ (34 "B.Paste" user)
+ (35 "F.Paste" user)
+ (36 "B.SilkS" user "B.Silkscreen")
+ (37 "F.SilkS" user "F.Silkscreen")
+ (38 "B.Mask" user)
+ (39 "F.Mask" user)
+ (40 "Dwgs.User" user "User.Drawings")
+ (41 "Cmts.User" user "User.Comments")
+ (42 "Eco1.User" user "User.Eco1")
+ (43 "Eco2.User" user "User.Eco2")
+ (44 "Edge.Cuts" user)
+ (45 "Margin" user)
+ (46 "B.CrtYd" user "B.Courtyard")
+ (47 "F.CrtYd" user "F.Courtyard")
+ (48 "B.Fab" user)
+ (49 "F.Fab" user)
+ (50 "User.1" user)
+ (51 "User.2" user)
+ (52 "User.3" user)
+ (53 "User.4" user)
+ (54 "User.5" user)
+ (55 "User.6" user)
+ (56 "User.7" user)
+ (57 "User.8" user)
+ (58 "User.9" user)
+ )
+
+ (setup
+ (stackup
+ (layer "F.SilkS" (type "Top Silk Screen"))
+ (layer "F.Paste" (type "Top Solder Paste"))
+ (layer "F.Mask" (type "Top Solder Mask") (thickness 0.01))
+ (layer "F.Cu" (type "copper") (thickness 0.035))
+ (layer "dielectric 1" (type "core") (thickness 1.51) (material "FR4") (epsilon_r 4.5) (loss_tangent 0.02))
+ (layer "B.Cu" (type "copper") (thickness 0.035))
+ (layer "B.Mask" (type "Bottom Solder Mask") (thickness 0.01))
+ (layer "B.Paste" (type "Bottom Solder Paste"))
+ (layer "B.SilkS" (type "Bottom Silk Screen"))
+ (copper_finish "None")
+ (dielectric_constraints no)
+ )
+ (pad_to_mask_clearance 0)
+ (pcbplotparams
+ (layerselection 0x00010fc_ffffffff)
+ (disableapertmacros false)
+ (usegerberextensions true)
+ (usegerberattributes false)
+ (usegerberadvancedattributes false)
+ (creategerberjobfile false)
+ (svguseinch false)
+ (svgprecision 6)
+ (excludeedgelayer true)
+ (plotframeref false)
+ (viasonmask false)
+ (mode 1)
+ (useauxorigin false)
+ (hpglpennumber 1)
+ (hpglpenspeed 20)
+ (hpglpendiameter 15.000000)
+ (dxfpolygonmode true)
+ (dxfimperialunits true)
+ (dxfusepcbnewfont true)
+ (psnegative false)
+ (psa4output false)
+ (plotreference true)
+ (plotvalue true)
+ (plotinvisibletext false)
+ (sketchpadsonfab false)
+ (subtractmaskfromsilk true)
+ (outputformat 1)
+ (mirror false)
+ (drillshape 0)
+ (scaleselection 1)
+ (outputdirectory "gerber/")
+ )
+ )
+
+ (net 0 "")
+ (net 1 "/GPIO27")
+ (net 2 "Net-(D1-Pad2)")
+ (net 3 "/GPIO32")
+ (net 4 "Net-(D2-Pad2)")
+ (net 5 "/GPIO33")
+ (net 6 "Net-(D3-Pad2)")
+ (net 7 "+3.3V")
+ (net 8 "/ESP_EN")
+ (net 9 "/GPI36")
+ (net 10 "/GPI39")
+ (net 11 "/GPI34")
+ (net 12 "/GPI35")
+ (net 13 "/GPIO25")
+ (net 14 "/GPIO26")
+ (net 15 "/GPIO14")
+ (net 16 "/GPIO12")
+ (net 17 "GND")
+ (net 18 "/GPIO13")
+ (net 19 "/GPIO9")
+ (net 20 "/GPIO10")
+ (net 21 "/GPIO11")
+ (net 22 "+5V")
+ (net 23 "/GPIO23")
+ (net 24 "/GPIO22")
+ (net 25 "/GPIO1")
+ (net 26 "/GPIO3")
+ (net 27 "/GPIO21")
+ (net 28 "/GPIO19")
+ (net 29 "/GPIO18")
+ (net 30 "/GPIO5")
+ (net 31 "/GPIO17")
+ (net 32 "/GPIO16")
+ (net 33 "/GPIO4")
+ (net 34 "/GPIO0")
+ (net 35 "/GPIO2")
+ (net 36 "/GPIO15")
+ (net 37 "/GPIO8")
+ (net 38 "/GPIO7")
+ (net 39 "/GPIO6")
+ (net 40 "Net-(Q1-Pad1)")
+ (net 41 "/ESL_PWR")
+ (net 42 "/ESL_P")
+
+ (footprint "Jumper:SolderJumper-2_P1.3mm_Bridged2Bar_RoundedPad1.0x1.5mm" (layer "F.Cu")
+ (tedit 5C74525F) (tstamp 009fe786-ba57-4df9-b9a9-c4e6ceeb736e)
+ (at 25 80.75 180)
+ (descr "SMD Solder Jumper, 1x1.5mm, rounded Pads, 0.3mm gap, bridged with 2 copper strips")
+ (tags "net tie solder jumper bridged")
+ (property "Sheetfile" "jig2.kicad_sch")
+ (property "Sheetname" "")
+ (path "/211cdd85-204d-48a7-a4ba-2fdbafe14e4d")
+ (attr exclude_from_pos_files)
+ (fp_text reference "JP1" (at 0 -1.8) (layer "F.SilkS")
+ (effects (font (size 1 1) (thickness 0.15)))
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diff --git a/PCB/alternative_PCB/jig2.kicad_prl b/PCB/alternative_PCB/jig2.kicad_prl
new file mode 100644
index 00000000..49cedd61
--- /dev/null
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diff --git a/PCB/alternative_PCB/jig2.kicad_pro b/PCB/alternative_PCB/jig2.kicad_pro
new file mode 100644
index 00000000..0034024e
--- /dev/null
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diff --git a/PCB/alternative_PCB/jig2.kicad_sch b/PCB/alternative_PCB/jig2.kicad_sch
new file mode 100644
index 00000000..6de47ff2
--- /dev/null
+++ b/PCB/alternative_PCB/jig2.kicad_sch
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+(kicad_sch (version 20211123) (generator eeschema)
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+ (uuid 43d4e830-ba5e-48ae-bdc0-06fa39a1ff51)
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+ (paper "A5")
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+ (title_block
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+ (reference "Q2") (unit 1) (value "Q_NMOS_GSD") (footprint "Package_TO_SOT_SMD:SOT-23_Handsoldering")
+ )
+ (path "/35c62db7-72ad-49ba-bc53-0082c693026c"
+ (reference "R1") (unit 1) (value "1k") (footprint "Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder")
+ )
+ (path "/26dd669f-002c-4d8e-9ec7-4c0ddeb720ff"
+ (reference "R2") (unit 1) (value "1k") (footprint "Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder")
+ )
+ (path "/9bae3c79-a26e-4809-bab3-b13de929103a"
+ (reference "R3") (unit 1) (value "1k") (footprint "Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder")
+ )
+ (path "/916bfc3c-3d2f-4c85-9bb5-228654c75d24"
+ (reference "R4") (unit 1) (value "10k") (footprint "Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder")
+ )
+ (path "/a60e6b12-b593-4a7b-b555-608b97c3e41c"
+ (reference "R5") (unit 1) (value "10k") (footprint "Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder")
+ )
+ (path "/002e12bb-bd97-482a-93d1-9eed7919c2c5"
+ (reference "R6") (unit 1) (value "10k") (footprint "Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder")
+ )
+ (path "/2285effd-5e8e-4b6d-8031-912351a0cc9c"
+ (reference "R7") (unit 1) (value "10k") (footprint "Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder")
+ )
+ (path "/80d5edf7-5630-45fc-9772-816b4e8be289"
+ (reference "R8") (unit 1) (value "10k") (footprint "Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder")
+ )
+ (path "/a9fb61c6-4b67-4d76-960a-9470af90abcf"
+ (reference "R9") (unit 1) (value "10k") (footprint "Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder")
+ )
+ (path "/55480ab7-8e5f-42a6-85fb-a1d413e8a208"
+ (reference "SW1") (unit 1) (value "SW_Push") (footprint "Button_Switch_THT:SW_PUSH_6mm")
+ )
+ (path "/f7c28322-bc5e-4c58-ae39-648daecdf178"
+ (reference "SW2") (unit 1) (value "SW_Push") (footprint "Button_Switch_THT:SW_PUSH_6mm")
+ )
+ (path "/fc60a0aa-1857-4af9-a82a-b24bd5818c7b"
+ (reference "SW3") (unit 1) (value "SW_Push") (footprint "Button_Switch_THT:SW_PUSH_6mm")
+ )
+ (path "/dbb87a83-6eb2-49ea-b687-fd3572bec704"
+ (reference "TP1") (unit 1) (value "TestPoint") (footprint "TestPoint:TestPoint_Pad_D2.5mm")
+ )
+ (path "/62c97d52-2820-4bd6-ad67-728a927eafb7"
+ (reference "U1") (unit 1) (value "ESL-connector") (footprint "esl:SOLUM_ZBS_DEBUG")
+ )
+ )
+)
diff --git a/PCB/alternative_PCB/jig_bot.jpg b/PCB/alternative_PCB/jig_bot.jpg
new file mode 100644
index 00000000..c9340a66
Binary files /dev/null and b/PCB/alternative_PCB/jig_bot.jpg differ
diff --git a/PCB/alternative_PCB/jig_top.jpg b/PCB/alternative_PCB/jig_top.jpg
new file mode 100644
index 00000000..bdb2be00
Binary files /dev/null and b/PCB/alternative_PCB/jig_top.jpg differ
diff --git a/PCB/alternative_PCB/pcb.png b/PCB/alternative_PCB/pcb.png
new file mode 100644
index 00000000..ca85428f
Binary files /dev/null and b/PCB/alternative_PCB/pcb.png differ
diff --git a/PCB/alternative_PCB/schematic.pdf b/PCB/alternative_PCB/schematic.pdf
new file mode 100644
index 00000000..b9d87cda
Binary files /dev/null and b/PCB/alternative_PCB/schematic.pdf differ
diff --git a/PCB/alternative_PCB/sym-lib-table b/PCB/alternative_PCB/sym-lib-table
new file mode 100644
index 00000000..f0bd8ed2
--- /dev/null
+++ b/PCB/alternative_PCB/sym-lib-table
@@ -0,0 +1,3 @@
+(sym_lib_table
+ (lib (name "ESLCONN")(type "KiCad")(uri "${KIPRJMOD}/ESLCONN.kicad_sym")(options "")(descr ""))
+)