Added C6 flasher, The S3 can flash the connected ESP32-C6 via UART

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/.gitignore

@@ -0,0 +1,5 @@
+.pio
+.vscode/.browse.c_cpp.db*
+.vscode/c_cpp_properties.json
+.vscode/launch.json
+.vscode/ipch

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/include/README

@@ -0,0 +1,39 @@
+
+This directory is intended for project header files.
+
+A header file is a file containing C declarations and macro definitions
+to be shared between several project source files. You request the use of a
+header file in your project source file (C, C++, etc) located in `src` folder
+by including it, with the C preprocessing directive `#include'.
+
+```src/main.c
+
+#include "header.h"
+
+int main (void)
+{
+ ...
+}
+```
+
+Including a header file produces the same results as copying the header file
+into each source file that needs it. Such copying would be time-consuming
+and error-prone. With a header file, the related declarations appear
+in only one place. If they need to be changed, they can be changed in one
+place, and programs that include the header file will automatically use the
+new version when next recompiled. The header file eliminates the labor of
+finding and changing all the copies as well as the risk that a failure to
+find one copy will result in inconsistencies within a program.
+
+In C, the usual convention is to give header files names that end with `.h'.
+It is most portable to use only letters, digits, dashes, and underscores in
+header file names, and at most one dot.
+
+Read more about using header files in official GCC documentation:
+
+* Include Syntax
+* Include Operation
+* Once-Only Headers
+* Computed Includes
+
+https://gcc.gnu.org/onlinedocs/cpp/Header-Files.html

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/README

@@ -0,0 +1,46 @@
+
+This directory is intended for project specific (private) libraries.
+PlatformIO will compile them to static libraries and link into executable file.
+
+The source code of each library should be placed in a an own separate directory
+("lib/your_library_name/[here are source files]").
+
+For example, see a structure of the following two libraries `Foo` and `Bar`:
+
+|--lib
+|  |
+|  |--Bar
+|  |  |--docs
+|  |  |--examples
+|  |  |--src
+|  |     |- Bar.c
+|  |     |- Bar.h
+|  |  |- library.json (optional, custom build options, etc) https://docs.platformio.org/page/librarymanager/config.html
+|  |
+|  |--Foo
+|  |  |- Foo.c
+|  |  |- Foo.h
+|  |
+|  |- README --> THIS FILE
+|
+|- platformio.ini
+|--src
+   |- main.c
+
+and a contents of `src/main.c`:
+```
+#include <Foo.h>
+#include <Bar.h>
+
+int main (void)
+{
+  ...
+}
+
+```
+
+PlatformIO Library Dependency Finder will find automatically dependent
+libraries scanning project source files.
+
+More information about PlatformIO Library Dependency Finder
+- https://docs.platformio.org/page/librarymanager/ldf.html

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/.github/ISSUE_TEMPLATE/bug_report.yml

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+name: Bug report
+description: Report a problem with esp-serial-flasher operation
+labels: ['Type: Bug']
+body:
+  - type: markdown
+    attributes:
+      value: |
+        * Please ensure you are using the latest version of `esp-serial-flasher`.
+        * Try using one of the examples from the `examples` directory and following the example documentation.
+        * If your board is a custom design, consider using our [free-of-charge schematic and PCB review service](https://www.espressif.com/en/contact-us/circuit-schematic-pcb-design-review).
+        * If still experiencing issues, please provide as many details as possible below about your hardware and software setup.
+  - type: input
+    id: port
+    attributes:
+      label: Port
+      description: Which port are you experiencing the issue with?
+      placeholder: ex. ESP, STM32
+    validations:
+      required: true
+  - type: input
+    id: target
+    attributes:
+      label: Target chip
+      description: Which chip are you trying to flash?
+      placeholder: ex. ESP8266, ESP32, ESP32-C3
+    validations:
+      required: true
+  - type: textarea
+    id: other-hw
+    attributes:
+      label: Hardware Configuration
+      description: What dev boards/custom PCB are you using, how are the chips connected, which baudrate are you trying to flash with?
+    validations:
+      required: true
+    id: output
+  - type: textarea
+    attributes:
+      label: Log output
+      description: Enable tracing with SERIAL_FLASHER_DEBUG_TRACE and provide the full log.
+      render: plain
+    validations:
+      required: true
+  - type: textarea
+    id: more-info
+    attributes:
+      label: More Information
+      description: Provide any additional information relevant to the issue.

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/.github/ISSUE_TEMPLATE/feature_request.yml

@@ -0,0 +1,34 @@
+name: Feature request
+description: Suggest an idea for this project
+labels: ['Type: Feature Request']
+body:
+  - type: markdown
+    attributes:
+      value: |
+        * We welcome any ideas or feature requests! It's helpful if you can explain exactly why the feature would be useful.
+        * Please check if the feature has already been suggested in [existing issues](https://github.com/espressif/esp-serial-flasher/issues) or [pull requests](https://github.com/espressif/esp-serial-flasher/pulls).
+        * Please provide enough context so that the reasoning behind the suggestion can be understood.
+  - type: textarea
+    id: problem-related
+    attributes:
+      label: Is your feature request related to a problem?
+      description: Please provide a clear and concise description of what the problem is.
+    validations:
+      required: true
+  - type: textarea
+    id: solution
+    attributes:
+      label: Describe the solution you'd like
+      description: Please provide a clear and concise description of a solution of the described problem or usecase.
+    validations:
+      required: true
+  - type: textarea
+    id: alternatives
+    attributes:
+      label: Describe alternatives you've considered
+      description: Please provide a clear and concise description of any alternative solutions or features you've considered.
+  - type: textarea
+    id: context
+    attributes:
+      label: Additional context
+      description: Please add any other context here.

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/.github/workflows/issue_comment.yml

@@ -0,0 +1,20 @@
+name: Sync issue comments to JIRA
+
+# This workflow will be triggered when new issue comment is created (including PR comments)
+on: issue_comment
+
+jobs:
+  sync_issue_comments_to_jira:
+    name: Sync Issue Comments to Jira
+    runs-on: ubuntu-latest
+    steps:
+      - uses: actions/checkout@master
+      - name: Sync issue comments to JIRA
+        uses: espressif/github-actions/sync_issues_to_jira@master
+        env:
+          GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
+          JIRA_PASS: ${{ secrets.JIRA_PASS }}
+          JIRA_PROJECT: ESF
+          JIRA_COMPONENT: GitHub
+          JIRA_URL: ${{ secrets.JIRA_URL }}
+          JIRA_USER: ${{ secrets.JIRA_USER }}

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/.github/workflows/new_issues.yml

@@ -0,0 +1,20 @@
+name: Sync issues to Jira
+
+# This workflow will be triggered when a new issue is opened
+on: issues
+
+jobs:
+  sync_issues_to_jira:
+    name: Sync issues to Jira
+    runs-on: ubuntu-latest
+    steps:
+      - uses: actions/checkout@master
+      - name: Sync GitHub issues to Jira project
+        uses: espressif/github-actions/sync_issues_to_jira@master
+        env:
+          GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
+          JIRA_PASS: ${{ secrets.JIRA_PASS }}
+          JIRA_PROJECT: ESF
+          JIRA_COMPONENT: GitHub
+          JIRA_URL: ${{ secrets.JIRA_URL }}
+          JIRA_USER: ${{ secrets.JIRA_USER }}

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/.github/workflows/new_prs.yml

@@ -0,0 +1,25 @@
+name: Sync remain PRs to Jira
+
+# This workflow will be triggered every hour, to sync remaining PRs (i.e. PRs with zero comment) to Jira project
+# Note that, PRs can also get synced when new PR comment is created
+on:
+  schedule:
+    - cron: "0 * * * *"
+
+jobs:
+  sync_prs_to_jira:
+    name: Sync PRs to Jira
+    runs-on: ubuntu-latest
+    steps:
+      - uses: actions/checkout@master
+      - name: Sync PRs to Jira project
+        uses: espressif/github-actions/sync_issues_to_jira@master
+        with:
+          cron_job: true
+        env:
+          GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
+          JIRA_PASS: ${{ secrets.JIRA_PASS }}
+          JIRA_PROJECT: ESF
+          JIRA_COMPONENT: GitHub
+          JIRA_URL: ${{ secrets.JIRA_URL }}
+          JIRA_USER: ${{ secrets.JIRA_USER }}

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/.gitignore

@@ -0,0 +1,6 @@
+build
+sdkconfig
+sdkconfig.old
+empty_file.bin
+binaries.c
+*.lock

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/.gitlab-ci.yml

@@ -0,0 +1,139 @@
+stages:
+  - build
+  - test
+  - deploy
+
+workflow:
+  rules:
+    - if: '$CI_PIPELINE_SOURCE == "merge_request_event"'
+    - if: $CI_COMMIT_BRANCH && $CI_OPEN_MERGE_REQUESTS && $CI_PIPELINE_SOURCE == "push"
+      when: never
+    - if: "$CI_COMMIT_BRANCH"
+
+variables:
+  STM32_CUBE_F4_REPO: https://github.com/STMicroelectronics/STM32CubeF4
+  STM32_CUBE_F4_REPO_TAG: v1.26.2
+  ARM_TOOLCHAIN_URL: https://developer.arm.com/-/media/Files/downloads/gnu-rm/9-2020q2/gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2?revision=05382cca-1721-44e1-ae19-1e7c3dc96118&la=en&hash=D7C9D18FCA2DD9F894FD9F3C3DC9228498FA281A
+  QEMU_PATH: /opt/qemu/bin/qemu-system-xtensa
+  ZEPHYR_REPO: https://github.com/zephyrproject-rtos/zephyr.git
+  ZEPHYR_REPO_REV: v3.2.0
+  ZEPHYR_TOOLCHAIN: https://github.com/zephyrproject-rtos/sdk-ng/releases/download/v0.15.2/toolchain_linux-x86_64_xtensa-espressif_esp32_zephyr-elf.tar.gz
+  ZEPHYR_SDK: https://github.com/zephyrproject-rtos/sdk-ng/releases/download/v0.15.2/zephyr-sdk-0.15.2_linux-aarch64_minimal.tar.gz
+
+.build_idf_template:
+  stage: build
+  image: espressif/idf:latest
+  tags:
+    - build
+    - internet
+  variables:
+    PEDANTIC_FLAGS: "-Werror=all -Werror=extra"
+    EXTRA_CFLAGS: "${PEDANTIC_FLAGS}"
+    EXTRA_CXXFLAGS: "${PEDANTIC_FLAGS}"
+  script:
+    - cd $CI_PROJECT_DIR/examples/esp32_example
+    - idf.py build -DMD5_ENABLED=1
+    - idf.py build -DMD5_ENABLED=0
+    - cd $CI_PROJECT_DIR/examples/esp32_load_ram_example
+    - idf.py build
+    - cd $CI_PROJECT_DIR/examples/esp32_spi_load_ram_example
+    - idf.py build
+
+build_idf_v4.2:
+  extends: .build_idf_template
+  image: espressif/idf:release-v4.2
+
+build_idf_v4.3:
+  extends: .build_idf_template
+  image: espressif/idf:release-v4.3
+
+build_idf_v4.4:
+  extends: .build_idf_template
+  image: espressif/idf:release-v4.4
+
+build_idf_v5.0:
+  extends: .build_idf_template
+  image: espressif/idf:release-v5.0
+
+build_idf_v5.1:
+  extends: .build_idf_template
+  image: espressif/idf:release-v5.1
+
+build_idf_master:
+  extends: .build_idf_template
+  image: espressif/idf:latest
+
+build_stm32:
+  stage: build
+  # IDF is not necessary for STM32 build, but this image is already used in another job
+  # and it comes with a recent enough CMake version.
+  image: espressif/idf:latest
+  tags:
+    - build
+    - internet
+  script:
+    - cd $CI_PROJECT_DIR
+    - git submodule update --init
+    - git clone --depth=1 -b ${STM32_CUBE_F4_REPO_TAG} ${STM32_CUBE_F4_REPO}
+    - wget --no-verbose -O gcc-arm-none-eabi.tar.bz2 ${ARM_TOOLCHAIN_URL}
+    - tar -xjf gcc-arm-none-eabi.tar.bz2
+    - mv gcc-arm-none-eabi-* gcc-arm-none-eabi
+    - mkdir $CI_PROJECT_DIR/examples/stm32_example/build
+    - cd $CI_PROJECT_DIR/examples/stm32_example/build
+    - cmake -DTOOLCHAIN_PREFIX=$CI_PROJECT_DIR/gcc-arm-none-eabi -DSTM32Cube_DIR=$CI_PROJECT_DIR/STM32CubeF4 -G Ninja ..
+    - cmake --build .
+
+build_zephyr:
+  stage: build
+  image: espressif/idf:latest
+  tags:
+    - build
+    - internet
+  script:
+    - mkdir $CI_PROJECT_DIR/zephyrproject-rtos
+    - cd $CI_PROJECT_DIR/zephyrproject-rtos
+    - git clone --single-branch --depth=1 -b ${ZEPHYR_REPO_REV} ${ZEPHYR_REPO}
+    - mkdir $CI_PROJECT_DIR/zephyrproject-rtos/zephyr-sdk
+    - cd $CI_PROJECT_DIR/zephyrproject-rtos/zephyr-sdk
+    - wget --no-verbose -O zephyr_sdk.tar.gz ${ZEPHYR_SDK}
+    - tar xvf zephyr_sdk.tar.gz --strip-components=1
+    - wget --no-verbose -O esp32_toolchain.tar.gz ${ZEPHYR_TOOLCHAIN}
+    - tar xvf esp32_toolchain.tar.gz
+    - export ZEPHYR_SDK_INSTALL_DIR=$(pwd)
+    - export ZEPHYR_TOOLCHAIN_VARIANT="zephyr"
+    - cd $CI_PROJECT_DIR/zephyrproject-rtos/zephyr
+    - export ZEPHYR_BASE=$(pwd)
+    - pip install -r scripts/requirements.txt
+    - pip install wheel
+    - if [[ ! -d "$CI_PROJECT_DIR/zephyrproject-rtos/.west" ]]; then
+    - west init -l .
+    - fi
+    - unset IDF_PATH
+    - west zephyr-export
+    - west update hal_espressif
+    - west build -p -b esp32 $CI_PROJECT_DIR/examples/zephyr_example -DZEPHYR_EXTRA_MODULES=$CI_PROJECT_DIR
+
+run_tests:
+  stage: test
+  image: ${CI_DOCKER_REGISTRY}/qemu:esp-develop-20191124
+  tags:
+    - build
+    - internet
+  script:
+    - cd $CI_PROJECT_DIR/test
+    - export QEMU_PATH=/opt/qemu/bin/qemu-system-xtensa
+    - ./run_test.sh qemu
+    - ./run_test.sh host
+
+push_to_the_components_registry:
+  stage: deploy
+  image: python:3.10-alpine
+  tags:
+    - build
+    - internet
+  rules:
+    - if: '$CI_COMMIT_BRANCH == "master"'
+    - if: '$FORCE_PUSH_COMPONENT == "1"'
+  script:
+    - pip install idf-component-manager
+    - python -m idf_component_manager upload-component --allow-existing --name=esp-serial-flasher --namespace=espressif

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/.gitmodules

@@ -0,0 +1,3 @@
+[submodule "submodules/stm32-cmake"]
+	path = submodules/stm32-cmake
+	url = https://github.com/ObKo/stm32-cmake.git

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/CMakeLists.txt

@@ -0,0 +1,119 @@
+cmake_minimum_required(VERSION 3.5)
+
+set(srcs
+    src/esp_targets.c
+    src/md5_hash.c
+    src/esp_loader.c
+    src/protocol_common.c
+)
+
+if (DEFINED ESP_PLATFORM)
+    if (${CONFIG_SERIAL_FLASHER_INTERFACE_UART})
+        list(APPEND srcs
+            src/protocol_uart.c
+            src/slip.c
+            port/esp32_port.c
+        )
+    elseif (${CONFIG_SERIAL_FLASHER_INTERFACE_SPI})
+        list(APPEND srcs
+            src/protocol_spi.c
+            port/esp32_spi_port.c
+        )
+    endif()
+    # Register component to esp-idf build system
+    if ("${IDF_VERSION_MAJOR}.${IDF_VERSION_MINOR}" VERSION_GREATER "4.0")
+        # esp_timer component was introduced in v4.2
+        set(priv_requires driver)
+        if("${IDF_VERSION_MAJOR}.${IDF_VERSION_MINOR}" VERSION_GREATER "4.1")
+            list(APPEND priv_requires esp_timer)
+        endif()
+
+        idf_component_register(SRCS ${srcs}
+                               INCLUDE_DIRS include port
+                               PRIV_INCLUDE_DIRS private_include
+                               PRIV_REQUIRES ${priv_requires})
+
+        set(target ${COMPONENT_LIB})
+        component_compile_options(-Wstrict-prototypes)
+    else()
+        # Remove when dropping support for IDF 3.3
+        set(COMPONENT_SRCS ${srcs})
+        set(COMPONENT_ADD_INCLUDEDIRS include port)
+        set(COMPONENT_PRIV_INCLUDEDIRS private_include)
+        register_component()
+        set(target ${COMPONENT_TARGET})
+    endif()
+
+else()
+    if (NOT DEFINED SERIAL_FLASHER_INTERFACE_UART AND NOT DEFINED SERIAL_FLASHER_INTERFACE_SPI)
+        set(SERIAL_FLASHER_INTERFACE_UART true)
+    endif()
+
+    if (DEFINED SERIAL_FLASHER_INTERFACE_UART)
+        list(APPEND srcs
+            src/protocol_uart.c
+            src/slip.c
+        )
+    elseif (DEFINED SERIAL_FLASHER_INTERFACE_SPI)
+        list(APPEND srcs src/protocol_spi.c)
+    endif()
+
+    # Create traditional CMake target
+    add_library(flasher ${srcs})
+
+    target_include_directories(flasher PUBLIC include port PRIVATE private_include)
+
+    if(PORT STREQUAL "STM32")
+        target_link_libraries(flasher PUBLIC stm_cube)
+        target_sources(flasher PRIVATE port/stm32_port.c)
+    elseif(PORT STREQUAL "RASPBERRY_PI")
+        find_library(pigpio_LIB pigpio)
+        target_link_libraries(flasher PUBLIC ${pigpio_LIB})
+        target_sources(flasher PRIVATE port/raspberry_port.c)
+    else()
+        message(FATAL_ERROR "Selected port is not supported")
+    endif()
+
+    set(target flasher)
+
+endif()
+
+if (DEFINED SERIAL_FLASHER_INTERFACE_UART OR CONFIG_SERIAL_FLASHER_INTERFACE_UART STREQUAL "y")
+    target_compile_definitions(${target}
+    PUBLIC
+        SERIAL_FLASHER_INTERFACE_UART
+    )
+    if (DEFINED MD5_ENABLED OR CONFIG_SERIAL_FLASHER_MD5_ENABLED)
+        target_compile_definitions(${target} PUBLIC MD5_ENABLED=1)
+    endif()
+elseif (DEFINED SERIAL_FLASHER_INTERFACE_SPI OR CONFIG_SERIAL_FLASHER_INTERFACE_SPI STREQUAL "y")
+    target_compile_definitions(${target}
+    PUBLIC
+        SERIAL_FLASHER_INTERFACE_SPI
+    )
+endif()
+
+if(DEFINED SERIAL_FLASHER_DEBUG_TRACE OR CONFIG_SERIAL_FLASHER_DEBUG_TRACE)
+    target_compile_definitions(${target} PUBLIC SERIAL_FLASHER_DEBUG_TRACE)
+endif()
+
+if(DEFINED CONFIG_SERIAL_FLASHER_RESET_HOLD_TIME_MS AND DEFINED CONFIG_SERIAL_FLASHER_BOOT_HOLD_TIME_MS)
+    target_compile_definitions(${target}
+    PUBLIC
+        SERIAL_FLASHER_RESET_HOLD_TIME_MS=${CONFIG_SERIAL_FLASHER_RESET_HOLD_TIME_MS}
+        SERIAL_FLASHER_BOOT_HOLD_TIME_MS=${CONFIG_SERIAL_FLASHER_BOOT_HOLD_TIME_MS}
+    )
+else()
+    if(NOT DEFINED SERIAL_FLASHER_RESET_HOLD_TIME_MS)
+        target_compile_definitions(${target}
+        PUBLIC
+            SERIAL_FLASHER_RESET_HOLD_TIME_MS=100
+        )
+    endif()
+    if(NOT DEFINED SERIAL_FLASHER_BOOT_HOLD_TIME_MS)
+        target_compile_definitions(${target}
+        PUBLIC
+            SERIAL_FLASHER_BOOT_HOLD_TIME_MS=50
+        )
+    endif()
+endif()

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/Kconfig

@@ -0,0 +1,34 @@
+menu "ESP serial flasher"
+    config SERIAL_FLASHER_MD5_ENABLED
+        bool "Enable MD5 check"
+        default y
+        help
+            Select this option to enable MD5 hashsum check after flashing.
+
+    choice SERIAL_FLASHER_INTERFACE
+        prompt "Hardware interface to use for firmware download"
+        default SERIAL_FLASHER_INTERFACE_UART
+        help
+            esp-serial-flasher can work with UART and SPI interfaces.
+
+        config SERIAL_FLASHER_INTERFACE_UART
+            bool "UART"
+
+        config SERIAL_FLASHER_INTERFACE_SPI
+            bool "SPI (Only supports downloading to RAM, experimental)"
+
+    endchoice
+
+    config SERIAL_FLASHER_RESET_HOLD_TIME_MS
+        int "Time for which the reset pin is asserted when doing a hard reset"
+        default 100
+
+    config SERIAL_FLASHER_BOOT_HOLD_TIME_MS
+        int "Time for which the boot pin is asserted when doing a hard reset"
+        default 50
+
+    config SERIAL_FLASHER_DEBUG_TRACE
+        bool "Enable debug tracing output (only transfer data tracing is supported at the time)"
+        default n
+
+endmenu

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/LICENSE

@@ -0,0 +1,202 @@
+
+                                 Apache License
+                           Version 2.0, January 2004
+                        http://www.apache.org/licenses/
+
+   TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION
+
+   1. Definitions.
+
+      "License" shall mean the terms and conditions for use, reproduction,
+      and distribution as defined by Sections 1 through 9 of this document.
+
+      "Licensor" shall mean the copyright owner or entity authorized by
+      the copyright owner that is granting the License.
+
+      "Legal Entity" shall mean the union of the acting entity and all
+      other entities that control, are controlled by, or are under common
+      control with that entity. For the purposes of this definition,
+      "control" means (i) the power, direct or indirect, to cause the
+      direction or management of such entity, whether by contract or
+      otherwise, or (ii) ownership of fifty percent (50%) or more of the
+      outstanding shares, or (iii) beneficial ownership of such entity.
+
+      "You" (or "Your") shall mean an individual or Legal Entity
+      exercising permissions granted by this License.
+
+      "Source" form shall mean the preferred form for making modifications,
+      including but not limited to software source code, documentation
+      source, and configuration files.
+
+      "Object" form shall mean any form resulting from mechanical
+      transformation or translation of a Source form, including but
+      not limited to compiled object code, generated documentation,
+      and conversions to other media types.
+
+      "Work" shall mean the work of authorship, whether in Source or
+      Object form, made available under the License, as indicated by a
+      copyright notice that is included in or attached to the work
+      (an example is provided in the Appendix below).
+
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ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/README.md

@@ -0,0 +1,155 @@
+# esp-serial-flasher
+
+`esp-serial-flasher` is a portable C library for flashing or loading apps to RAM of Espressif SoCs from other host microcontrollers.
+
+## Using the library
+Espressif SoCs are normally programmed via serial interface (UART). The port layer for the given host microcontroller has to be implemented if not available. Details can be found in section below.
+
+Supported **host** microcontrollers:
+
+- STM32
+- Raspberry Pi SBC
+- ESP32
+- Any MCU running Zephyr OS
+
+Supported **target** microcontrollers:
+
+- ESP32
+- ESP8266
+- ESP32-S2
+- ESP32-S3
+- ESP32-C3
+- ESP32-C2
+- ESP32-H2
+- ESP32-C6
+
+Supported hardware interfaces:
+- UART
+- SPI (only for RAM download, experimental)
+
+For example usage check the `examples` directory.
+
+## Supporting a new host target
+
+In order to support a new target, following functions have to be implemented by user:
+
+- `loader_port_read()`
+- `loader_port_write()`
+- `loader_port_enter_bootloader()`
+- `loader_port_delay_ms()`
+- `loader_port_start_timer()`
+- `loader_port_remaining_time()`
+
+For the SPI interface ports
+- `loader_port_spi_set_cs()`
+needs to be implemented as well.
+
+The following functions are part of the [io.h](include/io.h) header for convenience, however, the user does not have to strictly follow function signatures, as there are not called directly from library.
+
+- `loader_port_change_transmission_rate()`
+- `loader_port_reset_target()`
+- `loader_port_debug_print()`
+
+Prototypes of all functions mentioned above can be found in [io.h](include/io.h).
+
+## Configuration
+
+These are the configuration toggles available to the user:
+
+* `SERIAL_FLASHER_INTERFACE_UART/SERIAL_FLASHER_INTERFACE_SPI`
+
+This defines the hardware interface to use. SPI interface only supports RAM download mode and is in experimental stage and can undergo changes.
+
+Default: SERIAL_FLASHER_INTERFACE_UART
+
+* `MD5_ENABLED`
+
+If enabled, `esp-serial-flasher` is capable of verifying flash integrity after writing to flash.
+
+Default: Enabled
+> Warning: As ROM bootloader of the ESP8266 does not support MD5_CHECK, this option has to be disabled!
+
+* `SERIAL_FLASHER_RESET_HOLD_TIME_MS`
+
+This is the time for which the reset pin is asserted when doing a hard reset in milliseconds.
+
+Default: 100
+
+* `SERIAL_FLASHER_BOOT_HOLD_TIME_MS`
+
+This is the time for which the boot pin is asserted when doing a hard reset in milliseconds.
+
+Default: 50
+
+Configuration can be passed to `cmake` via command line:
+
+```
+cmake -DMD5_ENABLED=1 .. && cmake --build .
+```
+
+### STM32 support
+
+The STM32 port makes use of STM32 HAL libraries, and these do not come with CMake support. In order to compile the project, `stm32-cmake` (a `CMake` support package) has to be pulled as submodule.
+
+```
+git clone --recursive https://github.com/espressif/esp-serial-flasher.git
+```
+
+If you have cloned this repository without the `--recursive` flag, you can initialize the submodule using the following command:
+
+```
+git submodule update --init
+```
+
+In addition to configuration parameters mentioned above, following definitions has to be set:
+
+- TOOLCHAIN_PREFIX: path to arm toolchain (i.e /home/user/gcc-arm-none-eabi-9-2019-q4-major)
+- STM32Cube_DIR: path to STM32 Cube libraries (i.e /home/user/STM32Cube/Repository/STM32Cube_FW_F4_V1.25.0)
+- STM32_CHIP: name of STM32 for which project should be compiled (i.e STM32F407VG)
+- PORT: STM32
+
+This can be achieved by passing definitions to the command line, such as:
+
+```
+cmake -DTOOLCHAIN_PREFIX="/path_to_toolchain" -DSTM32Cube_DIR="path_to_stm32Cube" -DSTM32_CHIP="STM32F407VG" -DPORT="STM32" .. && cmake --build .
+```
+
+Alternatively, those variables can be set in the top level `cmake` directory:
+
+```
+set(TOOLCHAIN_PREFIX    path_to_toolchain)
+set(STM32Cube_DIR       path_to_stm32_HAL)
+set(STM32_CHIP          STM32F407VG)
+set(PORT                STM32)
+```
+
+### Zephyr support
+
+The Zephyr port is ready to be integrated into Zephyr apps as a Zephyr module. In the manifest file (west.yml), add:
+
+```
+    - name: esp-flasher
+      url: https://github.com/espressif/esp-serial-flasher
+      revision: master
+      path: modules/lib/esp_flasher
+```
+
+And add
+
+```
+CONFIG_ESP_SERIAL_FLASHER=y
+CONFIG_CONSOLE_GETCHAR=y
+CONFIG_SERIAL_FLASHER_MD5_ENABLED=y
+```
+
+to the project configuration `prj.conf`.
+
+For the C/C++ source code, the example code provided in `examples/zephyr_example` can be used as a starting point.
+
+## Licence
+
+Code is distributed under Apache 2.0 license.
+
+## Known limitations
+
+Size of new binary image has to be known before flashing.

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/examples/binaries/RAM_APP/source/CMakeLists.txt

@@ -0,0 +1,15 @@
+# The following lines of boilerplate have to be in your project's
+# CMakeLists in this exact order for cmake to work correctly
+cmake_minimum_required(VERSION 3.16)
+
+# Here we remove all unecessary components from the build to make the binary smaller
+set(COMPONENTS main)
+
+include($ENV{IDF_PATH}/tools/cmake/project.cmake)
+project(hello_world)
+
+# This generates a binary file from the elf, as the RAM build doesn't do that automatically
+add_custom_command(TARGET ${PROJECT_NAME}.elf
+    POST_BUILD
+    COMMAND esptool.py --chip ${IDF_TARGET} elf2image --output app.bin ${PROJECT_NAME}.elf
+)

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/examples/binaries/RAM_APP/source/main/CMakeLists.txt

@@ -0,0 +1,2 @@
+idf_component_register(SRCS "main.c"
+                    INCLUDE_DIRS "")

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/examples/binaries/RAM_APP/source/main/main.c

@@ -0,0 +1,16 @@
+/*
+ * SPDX-FileCopyrightText: 2010-2023 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: CC0-1.0
+ */
+
+#include "freertos/FreeRTOS.h"
+#include "freertos/task.h"
+
+void app_main(void)
+{
+    while (true) {
+        esp_rom_printf("Hello world!\n");
+        vTaskDelay(1000 / portTICK_PERIOD_MS);
+    }
+}

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/examples/binaries/RAM_APP/source/sdkconfig.defaults

@@ -0,0 +1,11 @@
+# This file was generated using idf.py save-defconfig. It can be edited manually.
+# Espressif IoT Development Framework (ESP-IDF) Project Minimal Configuration
+#
+CONFIG_APP_BUILD_TYPE_ELF_RAM=y
+CONFIG_COMPILER_OPTIMIZATION_SIZE=y
+CONFIG_APP_NO_BLOBS=y
+CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_DISABLE=y
+CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT=y
+# CONFIG_ESP_ERR_TO_NAME_LOOKUP is not set
+CONFIG_ESP_SYSTEM_PANIC_SILENT_REBOOT=y
+CONFIG_LOG_DEFAULT_LEVEL_NONE=y

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/examples/common/bin2array.cmake

@@ -0,0 +1,20 @@
+# Creates C resources file from files in given directory recursively
+function(create_resources dir output)
+    # Create empty output file
+    file(WRITE ${output} "#include <stdint.h>\n\n")
+    # Collect input files
+    file(GLOB bin_paths ${dir}/ESP*/*)
+    # Iterate through input files
+    foreach(bin ${bin_paths})
+        # Get short filenames, by discarding relative path
+        file(GLOB name RELATIVE ${dir} ${bin})
+        # Replace filename spaces & extension separator for C compatibility
+        string(REGEX REPLACE "[\\./-]" "_" filename ${name})
+        # Read hex data from file
+        file(READ ${bin} filedata HEX)
+        # Convert hex data for C compatibility
+        string(REGEX REPLACE "([0-9a-f][0-9a-f])" "0x\\1," filedata ${filedata})
+        # Append data to output file
+        file(APPEND ${output} "const uint8_t  ${filename}[] = {${filedata}};\nconst uint32_t ${filename}_size = sizeof(${filename});\n")
+    endforeach()
+endfunction()

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/examples/esp32_example/CMakeLists.txt

@@ -0,0 +1,7 @@
+# The following lines of boilerplate have to be in your project's CMakeLists
+# in this exact order for cmake to work correctly
+cmake_minimum_required(VERSION 3.5)
+
+set(EXTRA_COMPONENT_DIRS ../../)
+include($ENV{IDF_PATH}/tools/cmake/project.cmake)
+project(esp-serial-flasher)

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/examples/esp32_example/README.md

@@ -0,0 +1,78 @@
+# Flash multiple partitions example
+
+## Overview
+
+Example demonstrates how to flash ESP32/ESP32-S2/ESP8266 from another (host) MCU using esp_serial_flash component API. In this case, ESP32 is also used as host MCU. Binaries to be flashed from host MCU to another Espressif SoC can be found in `binaries` folder and are converted into C-array during build process.
+
+Following steps are performed in order to re-program target's memory:
+
+1. Filesystem is initialized and mounted.
+2. UART1 through which new binary will be transfered is initialized.
+3. Host puts slave device into boot mode tries to connect by calling `esp_loader_connect()`.
+4. Binary file is opened and its size is acquired, as it has to be known before flashing.
+5. Then `esp_loader_flash_start()` is called to enter flashing mode and erase amount of memory to be flashed.
+6. `esp_loader_flash_write()` function is called repeatedly until the whole binary image is transfered.
+
+Note: In addition, to steps mentioned above, `esp_loader_change_transmission_rate`  is called after connection is established in order to increase flashing speed. This does not apply for ESP8266, as its bootloader does not support this command. However, ESP8266 is capable of detecting baud rate during connection phase, and can be changed before calling `esp_loader_connect`, if necessary.
+
+## SPI pin initialization
+
+In majority of cases `ESP_LOADER_CONNECT_DEFAULT` helper macro is used in order to initialize `loader_connect_args_t` data structure passed to `esp_loader_connect`. Helper macro sets `spi_pin_config` field of the data structure to zero, thus, default SPI pins are used to connect to FLASH memory. In special cases, such as custom design in which FLASH is connected to different pins, `spi_pin_config` field has to be set accordingly. For more detailed information refer to [serial protocol](https://docs.espressif.com/projects/esptool/en/latest/esp32s3/advanced-topics/serial-protocol.html).
+
+## Hardware Required
+
+* Two development boards with ESP32 SoC (e.g., ESP32-DevKitC, ESP-WROVER-KIT, etc.).
+* One or two USB cables for power supply and programming.
+
+## Hardware connection
+
+Table below shows connection between two ESP32 devices.
+
+| ESP32 (host) | ESP32 (slave) |
+|:------------:|:-------------:|
+|    IO26      |      IO0      |
+|    IO25      |     RESET     |
+|    IO4       |      RX0      |
+|    IO5       |      TX0      |
+
+Note: interconnection is the same for all three targets (slaves). 
+
+## Build and flash
+
+To run the example, type the following command:
+
+```CMake
+idf.py -p PORT flash monitor
+```
+
+(To exit the serial monitor, type ``Ctrl-]``.)
+
+See the Getting Started Guide for full steps to configure and use ESP-IDF to build projects.
+
+## Configuration
+
+For details about available configuration option, please refer to top level [README.md](../../README.md). 
+Compile definitions can be specified on command line when running `idf.py`, for example:
+
+```
+idf.py build -DMD5_ENABLED=1
+```
+Binaries to be flashed are placed in separate folder (binaries.c) for each possible target and converted to C-array. Without explicitly enabling MD5 check, flash integrity verification is disabled by default.
+
+## Example output
+
+Here is the example's console output:
+
+```
+...
+I (342) example: Initializing SPIFFS
+I (482) example: Image size: 144672
+I (902) example: Connected to target
+I (1732) example: Start programming
+I (1832) example: packet: 0  written: 1024 B
+I (1932) example: packet: 1  written: 1024 B
+...
+I (16052) example: packet: 140  written: 1024 B
+I (16152) example: packet: 141  written: 288 B
+I (16152) example: Finished programming
+```

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/examples/esp32_example/main/CMakeLists.txt

@@ -0,0 +1,22 @@
+set(srcs main.c ../../common/example_common.c)
+set(include_dirs . ../../common)
+
+if ("${IDF_VERSION_MAJOR}.${IDF_VERSION_MINOR}" VERSION_GREATER "4.0")
+    idf_component_register(SRCS ${srcs}
+                           INCLUDE_DIRS ${include_dirs})
+    set(target ${COMPONENT_LIB})
+else()
+    # remove when dropping IDF 3.3 support
+    set(COMPONENT_SRCS ${srcs})
+    set(COMPONENT_ADD_INCLUDEDIRS ${include_dirs})
+    register_component()
+    set(target ${COMPONENT_TARGET})
+endif()
+
+# Embed binaries into the app.
+# In ESP-IDF this can also be done using EMBED_FILES option of idf_component_register.
+# Here an external tool is used to make file embedding similar with other ports.
+include(${CMAKE_CURRENT_LIST_DIR}/../../common/bin2array.cmake)
+create_resources(${CMAKE_CURRENT_LIST_DIR}/../../binaries/Hello-world ${CMAKE_BINARY_DIR}/binaries.c)
+set_property(SOURCE ${CMAKE_BINARY_DIR}/binaries.c PROPERTY GENERATED 1)
+target_sources(${target} PRIVATE ${CMAKE_BINARY_DIR}/binaries.c)

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/examples/esp32_example/main/main.c

@@ -0,0 +1,54 @@
+/* Flash multiple partitions example
+
+   This example code is in the Public Domain (or CC0 licensed, at your option.)
+
+   Unless required by applicable law or agreed to in writing, this
+   software is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
+   CONDITIONS OF ANY KIND, either express or implied.
+*/
+
+#include <sys/param.h>
+#include <string.h>
+#include "esp_err.h"
+#include "esp_log.h"
+#include "driver/uart.h"
+#include "driver/gpio.h"
+#include "esp32_port.h"
+#include "esp_loader.h"
+#include "example_common.h"
+
+static const char *TAG = "serial_flasher";
+
+#define HIGHER_BAUDRATE 230400
+
+void app_main(void)
+{
+    example_binaries_t bin;
+
+    const loader_esp32_config_t config = {
+        .baud_rate = 115200,
+        .uart_port = UART_NUM_1,
+        .uart_rx_pin = GPIO_NUM_5,
+        .uart_tx_pin = GPIO_NUM_4,
+        .reset_trigger_pin = GPIO_NUM_25,
+        .gpio0_trigger_pin = GPIO_NUM_26,
+    };
+
+    if (loader_port_esp32_init(&config) != ESP_LOADER_SUCCESS) {
+        ESP_LOGE(TAG, "serial initialization failed.");
+        return;
+    }
+
+    if (connect_to_target(HIGHER_BAUDRATE) == ESP_LOADER_SUCCESS) {
+
+        get_example_binaries(esp_loader_get_target(), &bin);
+
+        ESP_LOGI(TAG, "Loading bootloader...");
+        flash_binary(bin.boot.data, bin.boot.size, bin.boot.addr);
+        ESP_LOGI(TAG, "Loading partition table...");
+        flash_binary(bin.part.data, bin.part.size, bin.part.addr);
+        ESP_LOGI(TAG, "Loading app...");
+        flash_binary(bin.app.data,  bin.app.size,  bin.app.addr);
+        ESP_LOGI(TAG, "Done!");
+    }
+}

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/examples/esp32_example/partitions.csv

@@ -0,0 +1,4 @@
+# Name,   Type, SubType, Offset,  Size, Flags
+nvs,      data, nvs,     ,        0x6000,
+phy_init, data, phy,     ,        0x1000,
+factory,  app,  factory, ,        1500K,

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/examples/esp32_example/sdkconfig.defaults

@@ -0,0 +1 @@
+CONFIG_PARTITION_TABLE_CUSTOM=y

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/examples/esp32_load_ram_example/CMakeLists.txt

@@ -0,0 +1,7 @@
+# The following lines of boilerplate have to be in your project's CMakeLists
+# in this exact order for cmake to work correctly
+cmake_minimum_required(VERSION 3.5)
+
+set(EXTRA_COMPONENT_DIRS ../../)
+include($ENV{IDF_PATH}/tools/cmake/project.cmake)
+project(esp32-serial-ram-loader)

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/examples/esp32_load_ram_example/main/CMakeLists.txt

@@ -0,0 +1,14 @@
+set(srcs main.c ../../common/example_common.c)
+set(include_dirs . ../../common)
+
+idf_component_register(SRCS ${srcs}
+                       INCLUDE_DIRS ${include_dirs})
+set(target ${COMPONENT_LIB})
+
+# Embed binaries into the app.
+# In ESP-IDF this can also be done using EMBED_FILES option of idf_component_register.
+# Here an external tool is used to make file embedding similar with other ports.
+include(${CMAKE_CURRENT_LIST_DIR}/../../common/bin2array.cmake)
+create_resources(${CMAKE_CURRENT_LIST_DIR}/../../binaries/RAM_APP ${CMAKE_BINARY_DIR}/binaries.c)
+set_property(SOURCE ${CMAKE_BINARY_DIR}/binaries.c PROPERTY GENERATED 1)
+target_sources(${target} PRIVATE ${CMAKE_BINARY_DIR}/binaries.c)

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/examples/esp32_load_ram_example/main/main.c

@@ -0,0 +1,80 @@
+/* Example of loading the program into RAM
+
+   This example code is in the Public Domain (or CC0 licensed, at your option.)
+
+   Unless required by applicable law or agreed to in writing, this
+   software is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
+   CONDITIONS OF ANY KIND, either express or implied.
+*/
+
+#include <sys/param.h>
+#include <string.h>
+#include "esp_err.h"
+#include "esp_log.h"
+#include "esp_task_wdt.h"
+#include "driver/uart.h"
+#include "driver/gpio.h"
+#include "esp32_port.h"
+#include "esp_loader.h"
+#include "example_common.h"
+#include "freertos/FreeRTOS.h"
+
+static const char *TAG = "serial_ram_loader";
+
+// This can be set to a higher baud rate, but because it takes some time to
+// switch the uart baud rate in slave_monitor task, the log at slave starup
+// time will be lost or garbled.
+#define HIGHER_BAUDRATE 115200
+
+// Max line size
+#define BUF_LEN 128
+static uint8_t buf[BUF_LEN] = {0};
+
+void slave_monitor(void *arg)
+{
+#if (HIGHER_BAUDRATE != 115200)
+    uart_flush_input(UART_NUM_1);
+    uart_flush(UART_NUM_1);
+    uart_set_baudrate(UART_NUM_1, 115200);
+#endif
+    while (1) {
+        int rxBytes = uart_read_bytes(UART_NUM_1, buf, BUF_LEN, 100 / portTICK_PERIOD_MS);
+        buf[rxBytes] = '\0';
+        printf("%s", buf);
+    }
+}
+
+void app_main(void)
+{
+    example_ram_app_binary_t bin;
+
+    const loader_esp32_config_t config = {
+        .baud_rate = 115200,
+        .uart_port = UART_NUM_1,
+        .uart_rx_pin = GPIO_NUM_5,
+        .uart_tx_pin = GPIO_NUM_4,
+        .reset_trigger_pin = GPIO_NUM_25,
+        .gpio0_trigger_pin = GPIO_NUM_26,
+    };
+
+    if (loader_port_esp32_init(&config) != ESP_LOADER_SUCCESS) {
+        ESP_LOGE(TAG, "serial initialization failed.");
+        abort();
+    }
+
+    if (connect_to_target(HIGHER_BAUDRATE) == ESP_LOADER_SUCCESS) {
+        get_example_ram_app_binary(esp_loader_get_target(), &bin);
+        ESP_LOGI(TAG, "Loading app to RAM ...");
+        esp_loader_error_t err = load_ram_binary(bin.ram_app.data);
+        if (err == ESP_LOADER_SUCCESS) {
+            // Forward slave's serial output
+            ESP_LOGI(TAG, "********************************************");
+            ESP_LOGI(TAG, "*** Logs below are print from slave .... ***");
+            ESP_LOGI(TAG, "********************************************");
+            xTaskCreate(slave_monitor, "slave_monitor", 2048, NULL, configMAX_PRIORITIES, NULL);
+        } else {
+            ESP_LOGE(TAG, "Loading to ram failed ...");
+        }
+    }
+    vTaskDelete(NULL);
+}

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/examples/esp32_spi_load_ram_example/CMakeLists.txt

@@ -0,0 +1,7 @@
+# The following lines of boilerplate have to be in your project's CMakeLists
+# in this exact order for cmake to work correctly
+cmake_minimum_required(VERSION 3.16)
+
+set(EXTRA_COMPONENT_DIRS ../../)
+include($ENV{IDF_PATH}/tools/cmake/project.cmake)
+project(esp32-spi-ram-loader)

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/examples/esp32_spi_load_ram_example/README.md

@@ -0,0 +1,80 @@
+# Example of loading the program into RAM through SPI
+
+## Overview
+
+This example demonstrates how to upload an app to RAM of an Espressif MCU with SPI download support from another (host) MCU using the `esp_serial_flash` component API. In this case, another Espressif MCU is used as the host. Binaries to be uploaded to RAM from host MCU to the target MCU can be found in `binaries/RAM_APP` folder and are converted into C-array during build process.
+
+Following steps are performed in order to re-program the target's memory:
+
+1. SPI2 through which the binary will be transfered is initialized.
+2. Host puts slave device into SPI download mode tries to connect by calling `esp_loader_connect()`.
+3. Then `esp_loader_mem_start()` is called for each segment in RAM.
+4. `esp_loader_flash_write()` function is called repeatedly for every segment until the whole binary image is transfered.
+5. `esp_loader_mem_finish()` is called with the binary entrypoint, telling the chip to start the uploaded program.
+6. UART2 is initialized for the connection to the target
+7. Target output is continually read and printed
+
+## Hardware Required
+
+* Two development boards, one with any Espressif MCU (e.g., ESP32-DevKitC, ESP-WROVER-KIT, etc.) and one with an Espressif MCU with SPI download support. Here is a short list of supported MCUs:
+1. ESP32-C3
+2. ESP32-C2
+3. ESP32-S3
+4. ESP32-S2
+5. ESP32-H2
+* One or two USB cables for power supply and programming.
+
+## Hardware connection
+
+Table below shows connection between two Espressif MCUs.
+
+| Host         | Slave         |
+|    IO_5      |    RESET      |
+|    IO_12     |    CLK        |
+|    IO_10     |    CS         |
+|    IO_13     |    MISO       |
+|    IO_11     |    MOSI       |
+|    IO_14     |    QUADWP     |
+|    IO_9      |    QUADHD     |
+|    IO_13     |    STRAP_B0   |
+|    IO_2      |    STRAP_B1   |
+|    IO_3      |    STRAP_B2   |
+|    IO_4      |    STRAP_B3   |
+|    IO_6      |    UART0_RX   |
+|    IO_7      |    UART0_TX   |
+
+> Note 1: Strapping bit pins are documented in the TRM for each respective chip
+
+> Note 2: For achieving highest speeds, check which pins go through the IO MUX bypassing the GPIO matrix and use those. Pins chosen here are IO MUX pins for ESP32S3 and ESP32S2 chips.
+
+## Build and flash
+
+To run the example, type the following command:
+
+```CMake
+idf.py -p PORT flash monitor
+```
+
+(To exit the serial monitor, type ``Ctrl-]``.)
+
+See the Getting Started Guide for full steps to configure and use ESP-IDF to build projects.
+
+## Example output
+
+Here is the example's console output:
+
+```
+Connected to target
+I (682) spi_ram_loader: Loading app to RAM ...
+Start loading
+Downloading 7840 bytes at 0x3fc96e00...
+Downloading 312 bytes at 0x3fca0020...
+Downloading 93164 bytes at 0x40380000...
+Finished loading
+I (802) spi_ram_loader: ********************************************
+I (802) spi_ram_loader: *** Logs below are print from slave .... ***
+I (812) spi_ram_loader: ********************************************
+Hello world!
+Hello world!
+...
+```

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/examples/esp32_spi_load_ram_example/main/CMakeLists.txt

@@ -0,0 +1,14 @@
+set(srcs main.c ../../common/example_common.c)
+set(include_dirs . ../../common)
+
+idf_component_register(SRCS ${srcs}
+                       INCLUDE_DIRS ${include_dirs})
+set(target ${COMPONENT_LIB})
+
+# Embed binaries into the app.
+# In ESP-IDF this can also be done using EMBED_FILES option of idf_component_register.
+# Here an external tool is used to make file embedding similar with other ports.
+include(${CMAKE_CURRENT_LIST_DIR}/../../common/bin2array.cmake)
+create_resources(${CMAKE_CURRENT_LIST_DIR}/../../binaries/RAM_APP ${CMAKE_BINARY_DIR}/binaries.c)
+set_property(SOURCE ${CMAKE_BINARY_DIR}/binaries.c PROPERTY GENERATED 1)
+target_sources(${target} PRIVATE ${CMAKE_BINARY_DIR}/binaries.c)

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/examples/esp32_spi_load_ram_example/main/main.c

@@ -0,0 +1,97 @@
+/* Example of loading the program into RAM through SPI
+
+   This example code is in the Public Domain (or CC0 licensed, at your option.)
+
+   Unless required by applicable law or agreed to in writing, this
+   software is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
+   CONDITIONS OF ANY KIND, either express or implied.
+*/
+
+#include <sys/param.h>
+#include <string.h>
+#include "esp_err.h"
+#include "esp_log.h"
+#include "esp_task_wdt.h"
+#include "driver/spi_master.h"
+#include "driver/uart.h"
+#include "driver/gpio.h"
+#include "esp32_spi_port.h"
+#include "esp_loader.h"
+#include "example_common.h"
+#include "freertos/FreeRTOS.h"
+
+static const char *TAG = "spi_ram_loader";
+
+// Max line size
+#define BUF_LEN 128
+static uint8_t buf[BUF_LEN] = {0};
+
+void slave_monitor(void *arg)
+{
+    // Initialize UART
+    uart_config_t uart_config = {
+        .baud_rate = 115200,
+        .data_bits = UART_DATA_8_BITS,
+        .parity    = UART_PARITY_DISABLE,
+        .stop_bits = UART_STOP_BITS_1,
+        .flow_ctrl = UART_HW_FLOWCTRL_DISABLE,
+#if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(5, 0, 0)
+        .source_clk = UART_SCLK_DEFAULT,
+#endif
+    };
+
+    ESP_ERROR_CHECK(uart_param_config(UART_NUM_2, &uart_config));
+
+    ESP_ERROR_CHECK(uart_set_pin(UART_NUM_2, GPIO_NUM_6, GPIO_NUM_7,
+                                 UART_PIN_NO_CHANGE, UART_PIN_NO_CHANGE));
+
+    ESP_ERROR_CHECK(uart_driver_install(UART_NUM_2, BUF_LEN * 4, BUF_LEN * 4, 0, NULL, 0));
+
+    while (1) {
+        int rxBytes = uart_read_bytes(UART_NUM_2, buf, BUF_LEN, 100 / portTICK_PERIOD_MS);
+        buf[rxBytes] = '\0';
+        printf("%s", buf);
+    }
+}
+
+void app_main(void)
+{
+    example_ram_app_binary_t bin;
+
+    const loader_esp32_spi_config_t config = {
+        .spi_bus = SPI2_HOST,
+        .frequency = 20 * 1000000,
+        .reset_trigger_pin = GPIO_NUM_5,
+        .spi_clk_pin = GPIO_NUM_12,
+        .spi_cs_pin = GPIO_NUM_10,
+        .spi_miso_pin = GPIO_NUM_13,
+        .spi_mosi_pin = GPIO_NUM_11,
+        .spi_quadwp_pin = GPIO_NUM_14,
+        .spi_quadhd_pin = GPIO_NUM_9,
+        .strap_bit0_pin = GPIO_NUM_13,
+        .strap_bit1_pin = GPIO_NUM_2,
+        .strap_bit2_pin = GPIO_NUM_3,
+        .strap_bit3_pin = GPIO_NUM_4,
+    };
+
+    if (loader_port_esp32_spi_init(&config) != ESP_LOADER_SUCCESS) {
+        ESP_LOGE(TAG, "SPI initialization failed.");
+        abort();
+    }
+
+    if (connect_to_target(0) == ESP_LOADER_SUCCESS) {
+        get_example_ram_app_binary(esp_loader_get_target(), &bin);
+        ESP_LOGI(TAG, "Loading app to RAM ...");
+        esp_loader_error_t err = load_ram_binary(bin.ram_app.data);
+        if (err == ESP_LOADER_SUCCESS) {
+            // Forward slave's serial output
+            ESP_LOGI(TAG, "********************************************");
+            ESP_LOGI(TAG, "*** Logs below are print from slave .... ***");
+            ESP_LOGI(TAG, "********************************************");
+            xTaskCreate(slave_monitor, "slave_monitor", 2048, NULL, configMAX_PRIORITIES, NULL);
+        } else {
+            ESP_LOGE(TAG, "Loading to RAM failed ...");
+        }
+    }
+    vTaskDelete(NULL);
+}

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/examples/esp32_spi_load_ram_example/sdkconfig.defaults

@@ -0,0 +1,4 @@
+# This file was generated using idf.py save-defconfig. It can be edited manually.
+# Espressif IoT Development Framework (ESP-IDF) Project Minimal Configuration
+#
+CONFIG_SERIAL_FLASHER_INTERFACE_SPI=y

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/examples/raspberry_example/CMakeLists.txt

@@ -0,0 +1,17 @@
+cmake_minimum_required(VERSION 3.5)
+
+set(FLASHER_DIR ${CMAKE_CURRENT_LIST_DIR}/../..)
+set(PORT RASPBERRY_PI)
+
+project(raspberry_flasher)
+    
+add_executable(${CMAKE_PROJECT_NAME} Src/main.c ../common/example_common.c)
+
+target_include_directories(${CMAKE_PROJECT_NAME} PRIVATE ../common/)
+
+add_subdirectory(${FLASHER_DIR} ${CMAKE_BINARY_DIR}/flasher)
+
+target_link_libraries(${CMAKE_PROJECT_NAME} PRIVATE flasher)
+
+# This example only supports one target (ESP32) and uses specific binary to be flashed.
+target_compile_definitions(${CMAKE_PROJECT_NAME} PRIVATE -DSINGLE_TARGET_SUPPORT=1)

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/examples/raspberry_example/README.md

@@ -0,0 +1,76 @@
+# Raspberry Pi example
+
+## Overview
+
+Example demonstrates how to flash ESP32 from Raspberry Pi 4 (Model B) using esp_serial_flash component API. AT command firmware to be flashed from Raspberry Pi to ESP32 can be found in `binaries`. USART0 is dedicated for communication with ESP32.
+
+Following steps are performed in order to re-program target's memory:
+
+1. Peripherals are initialized.
+2. Host puts slave device into boot mode tries to connect by calling `esp_loader_connect()`.
+3. Then `esp_loader_flash_start()` is called to enter flashing mode and erase amount of memory to be flashed.
+4. `esp_loader_flash_write()` function is called repeatedly until the whole binary image is transfered.
+5. At the end, `loader_port_reset_target()` is called to restart ESP32 and execute updated firmware.
+
+Note: In addition, to steps mentioned above, `esp_loader_change_transmission_rate`  is called after connection is established in order to increase flashing speed. Bootloader is also capable of detecting baud rate during connection phase, and can be changed before calling `esp_loader_connect`. However, it is recommended to start at lower speed and then use dedicated command to increase baud rate. This does not apply for ESP8266, as its bootloader does not support this command, therefore, baud rate can only be changed before connection phase in this case.
+
+## Hardware Required
+
+* Raspberry Pi 4 Model B. 
+* A development board with ESP32 SoC (e.g. ESP-WROVER-KIT, ESP32-DevKitC, etc.).
+* USB cable in case ESP32 board is powered from USB. ESP32 can be powered by Raspberry Pi as well.
+
+## Hardware connection
+
+Table below shows connection between Raspberry Pi and ESP32.
+
+| Raspberry Pi (host) |    ESP32 (slave)    |
+|:-------------------:|:-------------------:|
+|        GPIO3        |         IO0         |
+|        GPIO2        |         RST         |
+|        GPIO14       |         RX0         |
+|        GPIO15       |         TX0         |
+|         GND         |         GND         |
+
+Optionally, UART-to-USB bridge can be connected to PD5(RX) and PD6(TX) for debug purposes.
+
+## Installation
+
+### GPIO library
+Raspberry Pi makes use of [pigpio](http://abyz.me.uk/rpi/pigpio/) library in order to simplify controlling GPIO pins. Some distributions of 'Raspberry Pi OS' may come with `pigpio` already installed. Presence of the library in the system can checked by running command:
+```
+pigpiod -v
+```
+
+If not present, run following commands to install the library. 
+```
+sudo apt-get update
+sudo apt-get install pigpio
+```
+
+### Enable UART
+On Raspberry Pi 4, primary UART (UART0) is connected to the On-board Bluetooth module by default.
+In order to enable serial communication on this UART, run following command in terminal:
+```
+sudo raspi-config
+```
+
+* Navigate to **Interfacing Options -> Serial**.
+* Then it will ask for login shell to be accessible over Serial, select **No**.
+* After that, it will ask for enabling Hardware Serial port, select **Yes**.
+* Reboot the Raspberry Pi.
+
+## Build and run
+
+To compile the example:
+
+Create and navigate to `build` directory:
+```
+mkdir build && cd build
+```
+Run cmake, build example and run example: 
+```
+cmake .. && cmake --build . && ./raspberry_flasher
+```
+
+For more details regarding to esp_serial_flasher configuration, please refer to top level [README.md](../../README.md).

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/examples/raspberry_example/Src/main.c

@@ -0,0 +1,81 @@
+/* Flash multiple partitions example
+
+   This example code is in the Public Domain (or CC0 licensed, at your option.)
+
+   Unless required by applicable law or agreed to in writing, this
+   software is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
+   CONDITIONS OF ANY KIND, either express or implied.
+*/
+
+#include <stdio.h>
+#include <stdint.h>
+#include <stdlib.h>
+#include <string.h>
+#include <sys/param.h>
+#include "esp_loader.h"
+#include "example_common.h"
+#include "raspberry_port.h"
+
+#define TARGET_RST_Pin 2
+#define TARGET_IO0_Pin 3
+
+#define DEFAULT_BAUD_RATE 115200
+#define HIGHER_BAUD_RATE  460800
+#define SERIAL_DEVICE     "/dev/ttyS0"
+
+#define BINARY_PATH       "../../binaries/ESP32_AT_Firmware/Firmware.bin"
+
+
+static void upload_file(const char *path, size_t address)
+{
+    char *buffer = NULL;
+
+    FILE *image = fopen(path, "r");
+    if (image == NULL) {
+        printf("Error:Failed to open file %s\n", path);
+        return;
+    }
+
+    fseek(image, 0L, SEEK_END);
+    size_t size = ftell(image);
+    rewind(image);
+
+    printf("File %s opened. Size: %u bytes\n", path, size);
+
+    buffer = (char *)malloc(size);
+    if (buffer == NULL) {
+        printf("Error: Failed allocate memory\n");
+        goto cleanup;
+    }
+
+    // copy file content to buffer
+    size_t bytes_read = fread(buffer, 1, size, image);
+    if (bytes_read != size) {
+        printf("Error occurred while reading file");
+        goto cleanup;
+    }
+
+    flash_binary(buffer, size, address);
+
+cleanup:
+    fclose(image);
+    free(buffer);
+}
+
+int main(void)
+{
+    const loader_raspberry_config_t config = {
+        .device = SERIAL_DEVICE,
+        .baudrate = DEFAULT_BAUD_RATE,
+        .reset_trigger_pin = TARGET_RST_Pin,
+        .gpio0_trigger_pin = TARGET_IO0_Pin,
+    };
+
+    loader_port_raspberry_init(&config);
+
+    if (connect_to_target(HIGHER_BAUD_RATE) == ESP_LOADER_SUCCESS) {
+        upload_file(BINARY_PATH, 0);
+    }
+
+    loader_port_reset_target();
+}

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/examples/stm32_example/CMakeLists.txt

@@ -0,0 +1,39 @@
+cmake_minimum_required(VERSION 3.5)
+
+include(${CMAKE_CURRENT_LIST_DIR}/../common/bin2array.cmake)
+
+set(TOOLCHAIN_PREFIX / CACHE PATH "Path to arm toolchain")
+set(STM32Cube_DIR / CACHE PATH "Path to STM32 hal library")
+
+set(FLASHER_DIR          ${CMAKE_CURRENT_LIST_DIR}/../..)
+set(CMAKE_TOOLCHAIN_FILE ${FLASHER_DIR}/submodules/stm32-cmake/cmake/gcc_stm32.cmake)
+set(STM32_CHIP           STM32F407VG)
+set(PORT                 STM32)
+
+project(stm32_flasher)
+    
+enable_language(ASM)
+
+create_resources(${CMAKE_CURRENT_LIST_DIR}/../binaries/Hello-world Src/binaries.c)
+
+include_directories(${CMAKE_CURRENT_SOURCE_DIR} Inc)
+ 
+add_executable(${CMAKE_PROJECT_NAME} 
+    ../common/example_common.c
+    Src/main.c
+    Src/stm32f4xx_hal_msp.c
+    Src/stm32f4xx_it.c
+    Src/libc_compat.c
+    Src/binaries.c)
+
+target_include_directories(${CMAKE_PROJECT_NAME} PRIVATE ../common)
+
+add_subdirectory(${FLASHER_DIR}/submodules ${CMAKE_BINARY_DIR}/submodules)
+add_subdirectory(${FLASHER_DIR} ${CMAKE_BINARY_DIR}/flasher)
+
+target_link_libraries(${CMAKE_PROJECT_NAME} PRIVATE stm_cube flasher)
+ 
+STM32_ADD_HEX_BIN_TARGETS(${CMAKE_PROJECT_NAME})
+
+add_custom_target(BuildBinary ALL)
+add_dependencies(BuildBinary ${CMAKE_PROJECT_NAME}.bin)

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/examples/stm32_example/Inc/main.h

@@ -0,0 +1,50 @@
+/**
+  ******************************************************************************
+  * @file           : main.h
+  * @brief          : Header for main.c file.
+  *                   This file contains the common defines of the application.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "stm32f4xx_hal.h"
+
+void Error_Handler(void);
+
+#define GREEN_LED_Pin GPIO_PIN_12
+#define GREEN_LED_GPIO_Port GPIOD
+#define ORANGE_LED_Pin GPIO_PIN_13
+#define ORANGE_LED_GPIO_Port GPIOD
+#define RED_LED_Pin GPIO_PIN_14
+#define RED_LED_GPIO_Port GPIOD
+#define BLUE_LED_Pin GPIO_PIN_15
+#define BLUE_LED_GPIO_Port GPIOD
+#define TARGET_RST_Pin GPIO_PIN_4
+#define TARGET_RST_GPIO_Port GPIOB
+#define TARGET_IO0_Pin GPIO_PIN_5
+#define TARGET_IO0_GPIO_Port GPIOB
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/examples/stm32_example/Inc/stm32f4xx_hal_conf.h

@@ -0,0 +1,443 @@
+/**
+  ******************************************************************************
+  * @file    stm32f4xx_hal_conf_template.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration template file. 
+  *          This file should be copied to the application folder and renamed
+  *          to stm32f4xx_hal_conf.h.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */ 
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32F4xx_HAL_CONF_H
+#define __STM32F4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver 
+  */
+#define HAL_MODULE_ENABLED  
+
+  /* #define HAL_ADC_MODULE_ENABLED   */
+/* #define HAL_CRYP_MODULE_ENABLED   */
+/* #define HAL_CAN_MODULE_ENABLED   */
+/* #define HAL_CRC_MODULE_ENABLED   */
+/* #define HAL_CRYP_MODULE_ENABLED   */
+/* #define HAL_DAC_MODULE_ENABLED   */
+/* #define HAL_DCMI_MODULE_ENABLED   */
+/* #define HAL_DMA2D_MODULE_ENABLED   */
+/* #define HAL_ETH_MODULE_ENABLED   */
+/* #define HAL_NAND_MODULE_ENABLED   */
+/* #define HAL_NOR_MODULE_ENABLED   */
+/* #define HAL_PCCARD_MODULE_ENABLED   */
+/* #define HAL_SRAM_MODULE_ENABLED   */
+/* #define HAL_SDRAM_MODULE_ENABLED   */
+/* #define HAL_HASH_MODULE_ENABLED   */
+/* #define HAL_I2C_MODULE_ENABLED   */
+/* #define HAL_I2S_MODULE_ENABLED   */
+/* #define HAL_IWDG_MODULE_ENABLED   */
+/* #define HAL_LTDC_MODULE_ENABLED   */
+/* #define HAL_RNG_MODULE_ENABLED   */
+/* #define HAL_RTC_MODULE_ENABLED   */
+/* #define HAL_SAI_MODULE_ENABLED   */
+/* #define HAL_SD_MODULE_ENABLED   */
+/* #define HAL_MMC_MODULE_ENABLED   */
+/* #define HAL_SPI_MODULE_ENABLED   */
+/* #define HAL_TIM_MODULE_ENABLED   */
+#define HAL_UART_MODULE_ENABLED
+/* #define HAL_USART_MODULE_ENABLED   */
+/* #define HAL_IRDA_MODULE_ENABLED   */
+/* #define HAL_SMARTCARD_MODULE_ENABLED   */
+/* #define HAL_SMBUS_MODULE_ENABLED   */
+/* #define HAL_WWDG_MODULE_ENABLED   */
+/* #define HAL_PCD_MODULE_ENABLED   */
+/* #define HAL_HCD_MODULE_ENABLED   */
+/* #define HAL_DSI_MODULE_ENABLED   */
+/* #define HAL_QSPI_MODULE_ENABLED   */
+/* #define HAL_QSPI_MODULE_ENABLED   */
+/* #define HAL_CEC_MODULE_ENABLED   */
+/* #define HAL_FMPI2C_MODULE_ENABLED   */
+/* #define HAL_SPDIFRX_MODULE_ENABLED   */
+/* #define HAL_DFSDM_MODULE_ENABLED   */
+/* #define HAL_LPTIM_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## HSE/HSI Values adaptation ##################### */
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).  
+  */
+#if !defined  (HSE_VALUE) 
+  #define HSE_VALUE    ((uint32_t)25000000U) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    ((uint32_t)100U)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL). 
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE) 
+ #define LSI_VALUE  ((uint32_t)32000U)       /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */                      /*!< Value of the Internal Low Speed oscillator in Hz
+                                             The real value may vary depending on the variations
+                                             in voltage and temperature.*/
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  */
+#if !defined  (LSE_VALUE)
+ #define LSE_VALUE  ((uint32_t)32768U)    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+  #define LSE_STARTUP_TIMEOUT    ((uint32_t)5000U)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S peripheral
+  *        This value is used by the I2S HAL module to compute the I2S clock source 
+  *        frequency, this source is inserted directly through I2S_CKIN pad. 
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+  #define EXTERNAL_CLOCK_VALUE    ((uint32_t)12288000U) /*!< Value of the External audio frequency in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+#define  VDD_VALUE		      ((uint32_t)3300U) /*!< Value of VDD in mv */           
+#define  TICK_INT_PRIORITY            ((uint32_t)0U)   /*!< tick interrupt priority */            
+#define  USE_RTOS                     0U     
+#define  PREFETCH_ENABLE              1U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the 
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## Ethernet peripheral configuration ##################### */
+
+/* Section 1 : Ethernet peripheral configuration */
+
+/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */
+#define MAC_ADDR0   2U
+#define MAC_ADDR1   0U
+#define MAC_ADDR2   0U
+#define MAC_ADDR3   0U
+#define MAC_ADDR4   0U
+#define MAC_ADDR5   0U
+
+/* Definition of the Ethernet driver buffers size and count */   
+#define ETH_RX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for receive               */
+#define ETH_TX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for transmit              */
+#define ETH_RXBUFNB                    ((uint32_t)4U)       /* 4 Rx buffers of size ETH_RX_BUF_SIZE  */
+#define ETH_TXBUFNB                    ((uint32_t)4U)       /* 4 Tx buffers of size ETH_TX_BUF_SIZE  */
+
+/* Section 2: PHY configuration section */
+
+/* DP83848_PHY_ADDRESS Address*/ 
+#define DP83848_PHY_ADDRESS           0x01U
+/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ 
+#define PHY_RESET_DELAY                 ((uint32_t)0x000000FFU)
+/* PHY Configuration delay */
+#define PHY_CONFIG_DELAY                ((uint32_t)0x00000FFFU)
+
+#define PHY_READ_TO                     ((uint32_t)0x0000FFFFU)
+#define PHY_WRITE_TO                    ((uint32_t)0x0000FFFFU)
+
+/* Section 3: Common PHY Registers */
+
+#define PHY_BCR                         ((uint16_t)0x0000U)    /*!< Transceiver Basic Control Register   */
+#define PHY_BSR                         ((uint16_t)0x0001U)    /*!< Transceiver Basic Status Register    */
+ 
+#define PHY_RESET                       ((uint16_t)0x8000U)  /*!< PHY Reset */
+#define PHY_LOOPBACK                    ((uint16_t)0x4000U)  /*!< Select loop-back mode */
+#define PHY_FULLDUPLEX_100M             ((uint16_t)0x2100U)  /*!< Set the full-duplex mode at 100 Mb/s */
+#define PHY_HALFDUPLEX_100M             ((uint16_t)0x2000U)  /*!< Set the half-duplex mode at 100 Mb/s */
+#define PHY_FULLDUPLEX_10M              ((uint16_t)0x0100U)  /*!< Set the full-duplex mode at 10 Mb/s  */
+#define PHY_HALFDUPLEX_10M              ((uint16_t)0x0000U)  /*!< Set the half-duplex mode at 10 Mb/s  */
+#define PHY_AUTONEGOTIATION             ((uint16_t)0x1000U)  /*!< Enable auto-negotiation function     */
+#define PHY_RESTART_AUTONEGOTIATION     ((uint16_t)0x0200U)  /*!< Restart auto-negotiation function    */
+#define PHY_POWERDOWN                   ((uint16_t)0x0800U)  /*!< Select the power down mode           */
+#define PHY_ISOLATE                     ((uint16_t)0x0400U)  /*!< Isolate PHY from MII                 */
+
+#define PHY_AUTONEGO_COMPLETE           ((uint16_t)0x0020U)  /*!< Auto-Negotiation process completed   */
+#define PHY_LINKED_STATUS               ((uint16_t)0x0004U)  /*!< Valid link established               */
+#define PHY_JABBER_DETECTION            ((uint16_t)0x0002U)  /*!< Jabber condition detected            */
+  
+/* Section 4: Extended PHY Registers */
+#define PHY_SR                          ((uint16_t)0x10U)    /*!< PHY status register Offset                      */
+
+#define PHY_SPEED_STATUS                ((uint16_t)0x0002U)  /*!< PHY Speed mask                                  */
+#define PHY_DUPLEX_STATUS               ((uint16_t)0x0004U)  /*!< PHY Duplex mask                                 */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+* Activated: CRC code is present inside driver
+* Deactivated: CRC code cleaned from driver
+*/
+
+#define USE_SPI_CRC                     0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file 
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+  #include "stm32f4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+  #include "stm32f4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+  #include "stm32f4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+  #include "stm32f4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+   
+#ifdef HAL_CORTEX_MODULE_ENABLED
+  #include "stm32f4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+  #include "stm32f4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_CAN_MODULE_ENABLED
+  #include "stm32f4xx_hal_can.h"
+#endif /* HAL_CAN_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+  #include "stm32f4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+  #include "stm32f4xx_hal_cryp.h" 
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32f4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_DMA2D_MODULE_ENABLED
+  #include "stm32f4xx_hal_dma2d.h"
+#endif /* HAL_DMA2D_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+  #include "stm32f4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_DCMI_MODULE_ENABLED
+  #include "stm32f4xx_hal_dcmi.h"
+#endif /* HAL_DCMI_MODULE_ENABLED */
+
+#ifdef HAL_ETH_MODULE_ENABLED
+  #include "stm32f4xx_hal_eth.h"
+#endif /* HAL_ETH_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+  #include "stm32f4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+ 
+#ifdef HAL_SRAM_MODULE_ENABLED
+  #include "stm32f4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+  #include "stm32f4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+  #include "stm32f4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_PCCARD_MODULE_ENABLED
+  #include "stm32f4xx_hal_pccard.h"
+#endif /* HAL_PCCARD_MODULE_ENABLED */ 
+  
+#ifdef HAL_SDRAM_MODULE_ENABLED
+  #include "stm32f4xx_hal_sdram.h"
+#endif /* HAL_SDRAM_MODULE_ENABLED */      
+
+#ifdef HAL_HASH_MODULE_ENABLED
+ #include "stm32f4xx_hal_hash.h"
+#endif /* HAL_HASH_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+ #include "stm32f4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+ #include "stm32f4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+ #include "stm32f4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_LTDC_MODULE_ENABLED
+ #include "stm32f4xx_hal_ltdc.h"
+#endif /* HAL_LTDC_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+ #include "stm32f4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+ #include "stm32f4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+ #include "stm32f4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+ #include "stm32f4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SD_MODULE_ENABLED
+ #include "stm32f4xx_hal_sd.h"
+#endif /* HAL_SD_MODULE_ENABLED */
+
+#ifdef HAL_MMC_MODULE_ENABLED
+ #include "stm32f4xx_hal_mmc.h"
+#endif /* HAL_MMC_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+ #include "stm32f4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+ #include "stm32f4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+ #include "stm32f4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+ #include "stm32f4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+ #include "stm32f4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+ #include "stm32f4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+ #include "stm32f4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+ #include "stm32f4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_HCD_MODULE_ENABLED
+ #include "stm32f4xx_hal_hcd.h"
+#endif /* HAL_HCD_MODULE_ENABLED */
+   
+#ifdef HAL_DSI_MODULE_ENABLED
+ #include "stm32f4xx_hal_dsi.h"
+#endif /* HAL_DSI_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+ #include "stm32f4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_CEC_MODULE_ENABLED
+ #include "stm32f4xx_hal_cec.h"
+#endif /* HAL_CEC_MODULE_ENABLED */
+
+#ifdef HAL_FMPI2C_MODULE_ENABLED
+ #include "stm32f4xx_hal_fmpi2c.h"
+#endif /* HAL_FMPI2C_MODULE_ENABLED */
+
+#ifdef HAL_SPDIFRX_MODULE_ENABLED
+ #include "stm32f4xx_hal_spdifrx.h"
+#endif /* HAL_SPDIFRX_MODULE_ENABLED */
+
+#ifdef HAL_DFSDM_MODULE_ENABLED
+ #include "stm32f4xx_hal_dfsdm.h"
+#endif /* HAL_DFSDM_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+ #include "stm32f4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+   
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed. 
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+  #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+  void assert_failed(uint8_t* file, uint32_t line);
+#else
+  #define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */    
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32F4xx_HAL_CONF_H */
+ 
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/examples/stm32_example/Inc/stm32f4xx_it.h

@@ -0,0 +1,42 @@
+/**
+  ******************************************************************************
+  * @file    stm32f4xx_it.h
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+ ******************************************************************************
+  */
+
+#ifndef __STM32F4xx_IT_H
+#define __STM32F4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif 
+
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void SVC_Handler(void);
+void DebugMon_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32F4xx_IT_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/examples/stm32_example/README.md

@@ -0,0 +1,59 @@
+# STM32 example
+
+## Overview
+
+Example demonstrates how to flash ESP32 from another STM32 (host MCU) using esp_serial_flash component API. STM32F4-Discovery board is used in this example, as STM32F407VG has FLASH memory large enough to fit the whole hello-world example of ESP32. Binaries to be flashed from host MCU to ESP32 can be found in `binaries` directory and converted into C-arrays during build process. USART1 is dedicated for communication with ESP32, whereas, USART2 can be used for debug purposes by attaching UART-to-USB bridge.
+
+Following steps are performed in order to re-program target's memory:
+
+1. Peripherals are initialized.
+2. Host puts slave device into boot mode tries to connect by calling `esp_loader_connect()`.
+3. Then `esp_loader_flash_start()` is called to enter flashing mode and erase amount of memory to be flashed.
+4. `esp_loader_flash_write()` function is called repeatedly until the whole binary image is transfered.
+
+Note: In addition, to steps mentioned above, `esp_loader_change_transmission_rate`  is called after connection is established in order to increase flashing speed. Bootloader is also capable of detecting baud rate during connection phase, and can be changed before calling `esp_loader_connect`. However, it is recommended to start at lower speed and then use dedicated command to increase baud rate. This does not apply for ESP8266, as its bootloader does not support this command, therefore, baud rate can only be changed before connection phase in this case.
+
+## Hardware Required
+
+* STM32F4-Discovery board. 
+* A development board with ESP32 SoC (e.g. ESP-WROVER-KIT, ESP32-DevKitC, etc.).
+* One or two USB cables for power supply and programming.
+
+## Hardware connection
+
+Table below shows connection between STM32 and ESP32.
+
+| STM32 (host) | ESP32 (slave) |
+|:------------:|:-------------:|
+|    PB5       |      IO0      |
+|    PB4       |      RST      |
+|    PB6       |      RX0      |
+|    PB7       |      TX0      |
+
+Optionally, UART-to-USB bridge can be connected to PD5(RX) and PD6(TX) for debug purposes.
+
+## Build and flash
+
+To compile the example:
+
+Create and navigate to `build` directory:
+```
+mkdir build && cd build
+```
+Run cmake (with appropriate parameters) and build: 
+```
+cmake -DTOOLCHAIN_PREFIX="/path_to_toolchain" -DSTM32Cube_DIR="path_to_stm32Cube" -DSTM32_CHIP="STM32F407VG" -DPORT="STM32" .. && cmake --build .
+```
+
+Binaries to be flashed are placed in separate folder (binaries.c) for each possible target and converted to C-array. Without explicitly enabling MD5 check, flash integrity verification is disabled by default.
+
+For more details regarding to esp_serial_flasher configuration and STM32 support, please refer to top level [README.md](../../README.md).
+
+Note: CMake 3.13 or later is required.
+
+## STM32CubeMx configuration
+
+Following configuration was used to generate STM32 `cmake` based project:
+* Project tab: Toolchain/IDE - Other toolchain (GPDSC)
+* Code Generator tab: Add necessary files as reference in the toolchain project configuration file
+

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/examples/stm32_example/Src/libc_compat.c

@@ -0,0 +1,183 @@
+/* libc_compat
+
+   This code is in the Public Domain (or CC0 licensed, at your option.)
+
+   Unless required by applicable law or agreed to in writing, this
+   software is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
+   CONDITIONS OF ANY KIND, either express or implied.
+*/
+
+#include <errno.h>
+#include <sys/stat.h>
+#include <sys/times.h>
+#include <sys/unistd.h>
+#include <sys/time.h>
+
+#if defined STM32F1
+# include <stm32f1xx_hal.h>
+#elif defined STM32F2
+# include <stm32f2xx_hal.h>
+#elif defined STM32F4
+# include <stm32f4xx_hal.h>
+#elif defined STM32G0
+# include <stm32g0xx_hal.h>
+#endif
+
+extern uint32_t __get_MSP(void);
+extern UART_HandleTypeDef huart2;
+extern uint64_t virtualTimer;
+
+#undef errno
+extern int errno;
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+int _write(int file, char *ptr, int len);
+
+void _exit(int status)
+{
+    while (1);
+}
+
+int _close(int file)
+{
+    return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+    errno = ENOMEM;
+    return -1;
+}
+
+int _fork()
+{
+    errno = EAGAIN;
+    return -1;
+}
+
+int _fstat(int file, struct stat *st)
+{
+    st->st_mode = S_IFCHR;
+    return 0;
+}
+
+int _getpid()
+{
+    return 1;
+}
+
+int _gettimeofday(struct timeval *tv, struct timezone *tz)
+{
+    tv->tv_sec = HAL_GetTick() / 1000;
+    tv->tv_usec = (HAL_GetTick() % 1000) * 1000;
+    return 0;
+}
+
+int _isatty(int file)
+{
+    switch (file)
+    {
+    case STDOUT_FILENO:
+    case STDERR_FILENO:
+    case STDIN_FILENO:
+        return 1;
+    default:
+        //errno = ENOTTY;
+        errno = EBADF;
+        return 0;
+    }
+}
+
+int _kill(int pid, int sig)
+{
+    errno = EINVAL;
+    return (-1);
+}
+
+int _link(char *old, char *new)
+{
+    errno = EMLINK;
+    return -1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+    return 0;
+}
+
+caddr_t _sbrk(int incr)
+{
+    extern char _ebss;
+    static char *heap_end= &_ebss;
+    char *prev_heap_end;
+
+    prev_heap_end = heap_end;
+
+    char * stack = (char*) __get_MSP();
+    if (heap_end + incr > stack)
+    {
+        _write(STDERR_FILENO, "Heap and stack collision\n", 25);
+        errno = ENOMEM;
+        return (caddr_t) - 1;
+        //abort ();
+    }
+
+    heap_end += incr;
+    return (caddr_t) prev_heap_end;
+
+}
+
+int _read(int file, char *ptr, int len)
+{
+    switch (file)
+    {
+    case STDIN_FILENO:
+        HAL_UART_Receive(&huart2, (uint8_t *)ptr, 1, HAL_MAX_DELAY);
+        return 1;
+    default:
+        errno = EBADF;
+        return -1;
+    }
+}
+
+int _stat(const char *filepath, struct stat *st)
+{
+    st->st_mode = S_IFCHR;
+    return 0;
+}
+
+clock_t _times(struct tms *buf)
+{
+    return -1;
+}
+
+int _unlink(char *name)
+{
+    errno = ENOENT;
+    return -1;
+}
+
+int _wait(int *status)
+{
+    errno = ECHILD;
+    return -1;
+}
+
+int _write(int file, char *ptr, int len)
+{
+    switch (file)
+    {
+    case STDOUT_FILENO: /*stdout*/
+        HAL_UART_Transmit(&huart2, (uint8_t*)ptr, len, HAL_MAX_DELAY);
+        break;
+    case STDERR_FILENO: /* stderr */
+        HAL_UART_Transmit(&huart2, (uint8_t*)ptr, len, HAL_MAX_DELAY);
+        break;
+    default:
+        errno = EBADF;
+        return -1;
+    }
+    return len;
+}

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/examples/stm32_example/Src/main.c

@@ -0,0 +1,189 @@
+/**
+  ******************************************************************************
+  * @file           : main.c
+  * @brief          : Main program body
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+
+#include "main.h"
+#include <stdio.h>
+#include <stdint.h>
+#include <string.h>
+#include <sys/param.h>
+#include "stm32_port.h"
+#include "esp_loader.h"
+#include "example_common.h"
+
+UART_HandleTypeDef huart1;
+UART_HandleTypeDef huart2;
+
+void SystemClock_Config(void);
+static void MX_GPIO_Init(void);
+static void MX_USART1_UART_Init(void);
+static void MX_USART2_UART_Init(void);
+
+#define HIGHER_BAUDRATE 230400
+
+
+
+int main(void)
+{
+    example_binaries_t bin;
+
+    HAL_Init();
+    SystemClock_Config();
+    MX_GPIO_Init();
+    MX_USART1_UART_Init();
+    MX_USART2_UART_Init();
+
+    loader_stm32_config_t config = {
+        .huart = &huart1,
+        .port_io0 = GPIOB,
+        .pin_num_io0 = TARGET_IO0_Pin,
+        .port_rst = GPIOB,
+        .pin_num_rst = TARGET_RST_Pin,
+    };
+
+    loader_port_stm32_init(&config);
+    
+    if (connect_to_target(HIGHER_BAUDRATE) == ESP_LOADER_SUCCESS) {
+        
+        get_example_binaries(esp_loader_get_target(), &bin);
+
+        flash_binary(bin.boot.data, bin.boot.size, bin.boot.addr);
+        flash_binary(bin.part.data, bin.part.size, bin.part.addr);
+        flash_binary(bin.app.data,  bin.app.size,  bin.app.addr);
+    }
+
+    while (1) { }
+}
+
+
+void SystemClock_Config(void)
+{
+    RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+    RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+    /** Configure the main internal regulator output voltage
+    */
+    __HAL_RCC_PWR_CLK_ENABLE();
+    __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
+    /** Initializes the CPU, AHB and APB busses clocks
+    */
+    RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+    RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+    RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+    RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
+    if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
+        Error_Handler();
+    }
+    /** Initializes the CPU, AHB and APB busses clocks
+    */
+    RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
+                                  | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
+    RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI;
+    RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+    RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+    RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+    if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK) {
+        Error_Handler();
+    }
+}
+
+static void MX_USART1_UART_Init(void)
+{
+    huart1.Instance = USART1;
+    huart1.Init.BaudRate = 115200;
+    huart1.Init.WordLength = UART_WORDLENGTH_8B;
+    huart1.Init.StopBits = UART_STOPBITS_1;
+    huart1.Init.Parity = UART_PARITY_NONE;
+    huart1.Init.Mode = UART_MODE_TX_RX;
+    huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
+    huart1.Init.OverSampling = UART_OVERSAMPLING_16;
+    if (HAL_UART_Init(&huart1) != HAL_OK) {
+        Error_Handler();
+    }
+}
+
+static void MX_USART2_UART_Init(void)
+{
+    huart2.Instance = USART2;
+    huart2.Init.BaudRate = 115200;
+    huart2.Init.WordLength = UART_WORDLENGTH_8B;
+    huart2.Init.StopBits = UART_STOPBITS_1;
+    huart2.Init.Parity = UART_PARITY_NONE;
+    huart2.Init.Mode = UART_MODE_TX_RX;
+    huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE;
+    huart2.Init.OverSampling = UART_OVERSAMPLING_16;
+    if (HAL_UART_Init(&huart2) != HAL_OK) {
+        Error_Handler();
+    }
+}
+
+static void MX_GPIO_Init(void)
+{
+    GPIO_InitTypeDef GPIO_InitStruct = {0};
+
+    /* GPIO Ports Clock Enable */
+    __HAL_RCC_GPIOD_CLK_ENABLE();
+    __HAL_RCC_GPIOB_CLK_ENABLE();
+
+    /*Configure GPIO pin Output Level */
+    HAL_GPIO_WritePin(GPIOD, GREEN_LED_Pin | ORANGE_LED_Pin | RED_LED_Pin | BLUE_LED_Pin, GPIO_PIN_RESET);
+
+    /*Configure GPIO pin Output Level */
+    HAL_GPIO_WritePin(GPIOB, TARGET_RST_Pin | TARGET_IO0_Pin, GPIO_PIN_RESET);
+
+    /*Configure GPIO pins : GREEN_LED_Pin ORANGE_LED_Pin RED_LED_Pin BLUE_LED_Pin */
+    GPIO_InitStruct.Pin = GREEN_LED_Pin | ORANGE_LED_Pin | RED_LED_Pin | BLUE_LED_Pin;
+    GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
+
+    /*Configure GPIO pins : PB4 PB5 */
+    GPIO_InitStruct.Pin = TARGET_RST_Pin | TARGET_IO0_Pin;
+    GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+
+}
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+    /* User can add his own implementation to report the HAL error return state */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+    /* User can add his own implementation to report the file name and line number,
+       tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+}
+#endif /* USE_FULL_ASSERT */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/examples/stm32_example/Src/stm32f4xx_hal_msp.c

@@ -0,0 +1,109 @@
+/**
+  ******************************************************************************
+  * File Name          : stm32f4xx_hal_msp.c
+  * Description        : This file provides code for the MSP Initialization 
+  *                      and de-Initialization codes.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+
+#include "main.h"
+
+void HAL_MspInit(void)
+{
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+  __HAL_RCC_PWR_CLK_ENABLE();
+}
+
+/**
+* @brief UART MSP Initialization
+* This function configures the hardware resources used in this example
+* @param huart: UART handle pointer
+* @retval None
+*/
+void HAL_UART_MspInit(UART_HandleTypeDef* huart)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  if(huart->Instance==USART1)
+  {
+    /* Peripheral clock enable */
+    __HAL_RCC_USART1_CLK_ENABLE();
+  
+    __HAL_RCC_GPIOB_CLK_ENABLE();
+    /**USART1 GPIO Configuration    
+    PB6     ------> USART1_TX
+    PB7     ------> USART1_RX 
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+    GPIO_InitStruct.Alternate = GPIO_AF7_USART1;
+    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+
+  }
+  else if(huart->Instance==USART2)
+  {
+    /* Peripheral clock enable */
+    __HAL_RCC_USART2_CLK_ENABLE();
+  
+    __HAL_RCC_GPIOD_CLK_ENABLE();
+    /**USART2 GPIO Configuration    
+    PD5     ------> USART2_TX
+    PD6     ------> USART2_RX 
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_6;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+    GPIO_InitStruct.Alternate = GPIO_AF7_USART2;
+    HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
+  }
+
+}
+
+/**
+* @brief UART MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param huart: UART handle pointer
+* @retval None
+*/
+void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
+{
+  if(huart->Instance==USART1)
+  {
+    /* Peripheral clock disable */
+    __HAL_RCC_USART1_CLK_DISABLE();
+  
+    /**USART1 GPIO Configuration    
+    PB6     ------> USART1_TX
+    PB7     ------> USART1_RX 
+    */
+    HAL_GPIO_DeInit(GPIOB, GPIO_PIN_6|GPIO_PIN_7);
+
+  }
+  else if(huart->Instance==USART2)
+  {
+    /* Peripheral clock disable */
+    __HAL_RCC_USART2_CLK_DISABLE();
+  
+    /**USART2 GPIO Configuration    
+    PD5     ------> USART2_TX
+    PD6     ------> USART2_RX 
+    */
+    HAL_GPIO_DeInit(GPIOD, GPIO_PIN_5|GPIO_PIN_6);
+  }
+
+}
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/examples/stm32_example/Src/stm32f4xx_it.c

@@ -0,0 +1,204 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32f4xx_it.c
+  * @brief   Interrupt Service Routines.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32f4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include <stdio.h>
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+ 
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex-M4 Processor Interruption and Exception Handlers          */ 
+/******************************************************************************/
+/**
+  * @brief This function handles Non maskable interrupt.
+  */
+void NMI_Handler(void)
+{
+  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+  /* USER CODE END NonMaskableInt_IRQn 0 */
+  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+
+  /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Hard fault interrupt.
+  */
+void HardFault_Handler(void)
+{
+  /* USER CODE BEGIN HardFault_IRQn 0 */
+
+  /* USER CODE END HardFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+    /* USER CODE END W1_HardFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Memory management fault.
+  */
+void MemManage_Handler(void)
+{
+  /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+  /* USER CODE END MemoryManagement_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+    /* USER CODE END W1_MemoryManagement_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Pre-fetch fault, memory access fault.
+  */
+void BusFault_Handler(void)
+{
+  /* USER CODE BEGIN BusFault_IRQn 0 */
+
+  /* USER CODE END BusFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+    /* USER CODE END W1_BusFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Undefined instruction or illegal state.
+  */
+void UsageFault_Handler(void)
+{
+  /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+  /* USER CODE END UsageFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+    /* USER CODE END W1_UsageFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles System service call via SWI instruction.
+  */
+void SVC_Handler(void)
+{
+  /* USER CODE BEGIN SVCall_IRQn 0 */
+
+  /* USER CODE END SVCall_IRQn 0 */
+  /* USER CODE BEGIN SVCall_IRQn 1 */
+
+  /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Debug monitor.
+  */
+void DebugMon_Handler(void)
+{
+  /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+  /* USER CODE END DebugMonitor_IRQn 0 */
+  /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+  /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Pendable request for system service.
+  */
+void PendSV_Handler(void)
+{
+  /* USER CODE BEGIN PendSV_IRQn 0 */
+
+  /* USER CODE END PendSV_IRQn 0 */
+  /* USER CODE BEGIN PendSV_IRQn 1 */
+
+  /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+  * @brief This function handles System tick timer.
+  */
+void SysTick_Handler(void)
+{
+  /* USER CODE BEGIN SysTick_IRQn 0 */
+
+  /* USER CODE END SysTick_IRQn 0 */
+  HAL_IncTick();
+  /* USER CODE BEGIN SysTick_IRQn 1 */
+
+  /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32F4xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32f4xx.s).                    */
+/******************************************************************************/
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/examples/stm32_example/Src/system_stm32f4xx.c

@@ -0,0 +1,727 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32f4xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File.
+  *
+  *   This file provides two functions and one global variable to be called from 
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and 
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32f4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick 
+  *                                  timer or configure other parameters.
+  *                                     
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32f4xx_system
+  * @{
+  */  
+  
+/** @addtogroup STM32F4xx_System_Private_Includes
+  * @{
+  */
+
+
+#include "stm32f4xx.h"
+
+#if !defined  (HSE_VALUE) 
+  #define HSE_VALUE    ((uint32_t)25000000) /*!< Default value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to use external SRAM or SDRAM as data memory  */
+#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)\
+ || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
+ || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx)
+/* #define DATA_IN_ExtSRAM */
+#endif /* STM32F40xxx || STM32F41xxx || STM32F42xxx || STM32F43xxx || STM32F469xx || STM32F479xx ||\
+          STM32F412Zx || STM32F412Vx */
+ 
+#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
+ || defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
+/* #define DATA_IN_ExtSDRAM */
+#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx ||\
+          STM32F479xx */
+
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00 /*!< Vector Table base offset field. 
+                                   This value must be a multiple of 0x200. */
+/******************************************************************************/
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F4xx_System_Private_Variables
+  * @{
+  */
+  /* This variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency 
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+uint32_t SystemCoreClock = 16000000;
+const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
+const uint8_t APBPrescTable[8]  = {0, 0, 0, 0, 1, 2, 3, 4};
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+#if defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)
+  static void SystemInit_ExtMemCtl(void); 
+#endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system
+  *         Initialize the FPU setting, vector table location and External memory 
+  *         configuration.
+  * @param  None
+  * @retval None
+  */
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2));  /* set CP10 and CP11 Full Access */
+  #endif
+
+#if defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)
+  SystemInit_ExtMemCtl(); 
+#endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+   * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *           
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.         
+  *     
+  * @note   - The system frequency computed by this function is not the real 
+  *           frequency in the chip. It is calculated based on the predefined 
+  *           constant and the selected clock source:
+  *             
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
+  *                                              
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
+  *                          
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) 
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *         
+  *         (*) HSI_VALUE is a constant defined in stm32f4xx_hal_conf.h file (default value
+  *             16 MHz) but the real value may vary depending on the variations
+  *             in voltage and temperature.   
+  *    
+  *         (**) HSE_VALUE is a constant defined in stm32f4xx_hal_conf.h file (its value
+  *              depends on the application requirements), user has to ensure that HSE_VALUE
+  *              is same as the real frequency of the crystal used. Otherwise, this function
+  *              may have wrong result.
+  *                
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *     
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp = 0, pllvco = 0, pllp = 2, pllsource = 0, pllm = 2;
+  
+  /* Get SYSCLK source -------------------------------------------------------*/
+  tmp = RCC->CFGR & RCC_CFGR_SWS;
+
+  switch (tmp)
+  {
+    case 0x00:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+    case 0x04:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+    case 0x08:  /* PLL used as system clock source */
+
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N
+         SYSCLK = PLL_VCO / PLL_P
+         */    
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) >> 22;
+      pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
+      
+      if (pllsource != 0)
+      {
+        /* HSE used as PLL clock source */
+        pllvco = (HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
+      }
+      else
+      {
+        /* HSI used as PLL clock source */
+        pllvco = (HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
+      }
+
+      pllp = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >>16) + 1 ) *2;
+      SystemCoreClock = pllvco/pllp;
+      break;
+    default:
+      SystemCoreClock = HSI_VALUE;
+      break;
+  }
+  /* Compute HCLK frequency --------------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK frequency */
+  SystemCoreClock >>= tmp;
+}
+
+#if defined (DATA_IN_ExtSRAM) && defined (DATA_IN_ExtSDRAM)
+#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
+ || defined(STM32F469xx) || defined(STM32F479xx)
+/**
+  * @brief  Setup the external memory controller.
+  *         Called in startup_stm32f4xx.s before jump to main.
+  *         This function configures the external memories (SRAM/SDRAM)
+  *         This SRAM/SDRAM will be used as program data memory (including heap and stack).
+  * @param  None
+  * @retval None
+  */
+void SystemInit_ExtMemCtl(void)
+{
+  __IO uint32_t tmp = 0x00;
+
+  register uint32_t tmpreg = 0, timeout = 0xFFFF;
+  register __IO uint32_t index;
+
+  /* Enable GPIOC, GPIOD, GPIOE, GPIOF, GPIOG, GPIOH and GPIOI interface clock */
+  RCC->AHB1ENR |= 0x000001F8;
+
+  /* Delay after an RCC peripheral clock enabling */
+  tmp = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOCEN);
+  
+  /* Connect PDx pins to FMC Alternate function */
+  GPIOD->AFR[0]  = 0x00CCC0CC;
+  GPIOD->AFR[1]  = 0xCCCCCCCC;
+  /* Configure PDx pins in Alternate function mode */  
+  GPIOD->MODER   = 0xAAAA0A8A;
+  /* Configure PDx pins speed to 100 MHz */  
+  GPIOD->OSPEEDR = 0xFFFF0FCF;
+  /* Configure PDx pins Output type to push-pull */  
+  GPIOD->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PDx pins */ 
+  GPIOD->PUPDR   = 0x00000000;
+
+  /* Connect PEx pins to FMC Alternate function */
+  GPIOE->AFR[0]  = 0xC00CC0CC;
+  GPIOE->AFR[1]  = 0xCCCCCCCC;
+  /* Configure PEx pins in Alternate function mode */ 
+  GPIOE->MODER   = 0xAAAA828A;
+  /* Configure PEx pins speed to 100 MHz */ 
+  GPIOE->OSPEEDR = 0xFFFFC3CF;
+  /* Configure PEx pins Output type to push-pull */  
+  GPIOE->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PEx pins */ 
+  GPIOE->PUPDR   = 0x00000000;
+  
+  /* Connect PFx pins to FMC Alternate function */
+  GPIOF->AFR[0]  = 0xCCCCCCCC;
+  GPIOF->AFR[1]  = 0xCCCCCCCC;
+  /* Configure PFx pins in Alternate function mode */   
+  GPIOF->MODER   = 0xAA800AAA;
+  /* Configure PFx pins speed to 50 MHz */ 
+  GPIOF->OSPEEDR = 0xAA800AAA;
+  /* Configure PFx pins Output type to push-pull */  
+  GPIOF->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PFx pins */ 
+  GPIOF->PUPDR   = 0x00000000;
+
+  /* Connect PGx pins to FMC Alternate function */
+  GPIOG->AFR[0]  = 0xCCCCCCCC;
+  GPIOG->AFR[1]  = 0xCCCCCCCC;
+  /* Configure PGx pins in Alternate function mode */ 
+  GPIOG->MODER   = 0xAAAAAAAA;
+  /* Configure PGx pins speed to 50 MHz */ 
+  GPIOG->OSPEEDR = 0xAAAAAAAA;
+  /* Configure PGx pins Output type to push-pull */  
+  GPIOG->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PGx pins */ 
+  GPIOG->PUPDR   = 0x00000000;
+  
+  /* Connect PHx pins to FMC Alternate function */
+  GPIOH->AFR[0]  = 0x00C0CC00;
+  GPIOH->AFR[1]  = 0xCCCCCCCC;
+  /* Configure PHx pins in Alternate function mode */ 
+  GPIOH->MODER   = 0xAAAA08A0;
+  /* Configure PHx pins speed to 50 MHz */ 
+  GPIOH->OSPEEDR = 0xAAAA08A0;
+  /* Configure PHx pins Output type to push-pull */  
+  GPIOH->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PHx pins */ 
+  GPIOH->PUPDR   = 0x00000000;
+  
+  /* Connect PIx pins to FMC Alternate function */
+  GPIOI->AFR[0]  = 0xCCCCCCCC;
+  GPIOI->AFR[1]  = 0x00000CC0;
+  /* Configure PIx pins in Alternate function mode */ 
+  GPIOI->MODER   = 0x0028AAAA;
+  /* Configure PIx pins speed to 50 MHz */ 
+  GPIOI->OSPEEDR = 0x0028AAAA;
+  /* Configure PIx pins Output type to push-pull */  
+  GPIOI->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PIx pins */ 
+  GPIOI->PUPDR   = 0x00000000;
+  
+/*-- FMC Configuration -------------------------------------------------------*/
+  /* Enable the FMC interface clock */
+  RCC->AHB3ENR |= 0x00000001;
+  /* Delay after an RCC peripheral clock enabling */
+  tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);
+
+  FMC_Bank5_6->SDCR[0] = 0x000019E4;
+  FMC_Bank5_6->SDTR[0] = 0x01115351;      
+  
+  /* SDRAM initialization sequence */
+  /* Clock enable command */
+  FMC_Bank5_6->SDCMR = 0x00000011; 
+  tmpreg = FMC_Bank5_6->SDSR & 0x00000020; 
+  while((tmpreg != 0) && (timeout-- > 0))
+  {
+    tmpreg = FMC_Bank5_6->SDSR & 0x00000020; 
+  }
+
+  /* Delay */
+  for (index = 0; index<1000; index++);
+  
+  /* PALL command */
+  FMC_Bank5_6->SDCMR = 0x00000012;           
+  timeout = 0xFFFF;
+  while((tmpreg != 0) && (timeout-- > 0))
+  {
+    tmpreg = FMC_Bank5_6->SDSR & 0x00000020; 
+  }
+  
+  /* Auto refresh command */
+  FMC_Bank5_6->SDCMR = 0x00000073;
+  timeout = 0xFFFF;
+  while((tmpreg != 0) && (timeout-- > 0))
+  {
+    tmpreg = FMC_Bank5_6->SDSR & 0x00000020; 
+  }
+ 
+  /* MRD register program */
+  FMC_Bank5_6->SDCMR = 0x00046014;
+  timeout = 0xFFFF;
+  while((tmpreg != 0) && (timeout-- > 0))
+  {
+    tmpreg = FMC_Bank5_6->SDSR & 0x00000020; 
+  } 
+  
+  /* Set refresh count */
+  tmpreg = FMC_Bank5_6->SDRTR;
+  FMC_Bank5_6->SDRTR = (tmpreg | (0x0000027C<<1));
+  
+  /* Disable write protection */
+  tmpreg = FMC_Bank5_6->SDCR[0]; 
+  FMC_Bank5_6->SDCR[0] = (tmpreg & 0xFFFFFDFF);
+
+#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
+  /* Configure and enable Bank1_SRAM2 */
+  FMC_Bank1->BTCR[2]  = 0x00001011;
+  FMC_Bank1->BTCR[3]  = 0x00000201;
+  FMC_Bank1E->BWTR[2] = 0x0fffffff;
+#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */ 
+#if defined(STM32F469xx) || defined(STM32F479xx)
+  /* Configure and enable Bank1_SRAM2 */
+  FMC_Bank1->BTCR[2]  = 0x00001091;
+  FMC_Bank1->BTCR[3]  = 0x00110212;
+  FMC_Bank1E->BWTR[2] = 0x0fffffff;
+#endif /* STM32F469xx || STM32F479xx */
+
+  (void)(tmp); 
+}
+#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
+#elif defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)
+/**
+  * @brief  Setup the external memory controller.
+  *         Called in startup_stm32f4xx.s before jump to main.
+  *         This function configures the external memories (SRAM/SDRAM)
+  *         This SRAM/SDRAM will be used as program data memory (including heap and stack).
+  * @param  None
+  * @retval None
+  */
+void SystemInit_ExtMemCtl(void)
+{
+  __IO uint32_t tmp = 0x00;
+#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
+ || defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
+#if defined (DATA_IN_ExtSDRAM)
+  register uint32_t tmpreg = 0, timeout = 0xFFFF;
+  register __IO uint32_t index;
+
+#if defined(STM32F446xx)
+  /* Enable GPIOA, GPIOC, GPIOD, GPIOE, GPIOF, GPIOG interface
+      clock */
+  RCC->AHB1ENR |= 0x0000007D;
+#else
+  /* Enable GPIOC, GPIOD, GPIOE, GPIOF, GPIOG, GPIOH and GPIOI interface 
+      clock */
+  RCC->AHB1ENR |= 0x000001F8;
+#endif /* STM32F446xx */  
+  /* Delay after an RCC peripheral clock enabling */
+  tmp = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOCEN);
+  
+#if defined(STM32F446xx)
+  /* Connect PAx pins to FMC Alternate function */
+  GPIOA->AFR[0]  |= 0xC0000000;
+  GPIOA->AFR[1]  |= 0x00000000;
+  /* Configure PDx pins in Alternate function mode */
+  GPIOA->MODER   |= 0x00008000;
+  /* Configure PDx pins speed to 50 MHz */
+  GPIOA->OSPEEDR |= 0x00008000;
+  /* Configure PDx pins Output type to push-pull */
+  GPIOA->OTYPER  |= 0x00000000;
+  /* No pull-up, pull-down for PDx pins */
+  GPIOA->PUPDR   |= 0x00000000;
+
+  /* Connect PCx pins to FMC Alternate function */
+  GPIOC->AFR[0]  |= 0x00CC0000;
+  GPIOC->AFR[1]  |= 0x00000000;
+  /* Configure PDx pins in Alternate function mode */
+  GPIOC->MODER   |= 0x00000A00;
+  /* Configure PDx pins speed to 50 MHz */
+  GPIOC->OSPEEDR |= 0x00000A00;
+  /* Configure PDx pins Output type to push-pull */
+  GPIOC->OTYPER  |= 0x00000000;
+  /* No pull-up, pull-down for PDx pins */
+  GPIOC->PUPDR   |= 0x00000000;
+#endif /* STM32F446xx */
+
+  /* Connect PDx pins to FMC Alternate function */
+  GPIOD->AFR[0]  = 0x000000CC;
+  GPIOD->AFR[1]  = 0xCC000CCC;
+  /* Configure PDx pins in Alternate function mode */  
+  GPIOD->MODER   = 0xA02A000A;
+  /* Configure PDx pins speed to 50 MHz */  
+  GPIOD->OSPEEDR = 0xA02A000A;
+  /* Configure PDx pins Output type to push-pull */  
+  GPIOD->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PDx pins */ 
+  GPIOD->PUPDR   = 0x00000000;
+
+  /* Connect PEx pins to FMC Alternate function */
+  GPIOE->AFR[0]  = 0xC00000CC;
+  GPIOE->AFR[1]  = 0xCCCCCCCC;
+  /* Configure PEx pins in Alternate function mode */ 
+  GPIOE->MODER   = 0xAAAA800A;
+  /* Configure PEx pins speed to 50 MHz */ 
+  GPIOE->OSPEEDR = 0xAAAA800A;
+  /* Configure PEx pins Output type to push-pull */  
+  GPIOE->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PEx pins */ 
+  GPIOE->PUPDR   = 0x00000000;
+
+  /* Connect PFx pins to FMC Alternate function */
+  GPIOF->AFR[0]  = 0xCCCCCCCC;
+  GPIOF->AFR[1]  = 0xCCCCCCCC;
+  /* Configure PFx pins in Alternate function mode */   
+  GPIOF->MODER   = 0xAA800AAA;
+  /* Configure PFx pins speed to 50 MHz */ 
+  GPIOF->OSPEEDR = 0xAA800AAA;
+  /* Configure PFx pins Output type to push-pull */  
+  GPIOF->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PFx pins */ 
+  GPIOF->PUPDR   = 0x00000000;
+
+  /* Connect PGx pins to FMC Alternate function */
+  GPIOG->AFR[0]  = 0xCCCCCCCC;
+  GPIOG->AFR[1]  = 0xCCCCCCCC;
+  /* Configure PGx pins in Alternate function mode */ 
+  GPIOG->MODER   = 0xAAAAAAAA;
+  /* Configure PGx pins speed to 50 MHz */ 
+  GPIOG->OSPEEDR = 0xAAAAAAAA;
+  /* Configure PGx pins Output type to push-pull */  
+  GPIOG->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PGx pins */ 
+  GPIOG->PUPDR   = 0x00000000;
+
+#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
+ || defined(STM32F469xx) || defined(STM32F479xx)  
+  /* Connect PHx pins to FMC Alternate function */
+  GPIOH->AFR[0]  = 0x00C0CC00;
+  GPIOH->AFR[1]  = 0xCCCCCCCC;
+  /* Configure PHx pins in Alternate function mode */ 
+  GPIOH->MODER   = 0xAAAA08A0;
+  /* Configure PHx pins speed to 50 MHz */ 
+  GPIOH->OSPEEDR = 0xAAAA08A0;
+  /* Configure PHx pins Output type to push-pull */  
+  GPIOH->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PHx pins */ 
+  GPIOH->PUPDR   = 0x00000000;
+  
+  /* Connect PIx pins to FMC Alternate function */
+  GPIOI->AFR[0]  = 0xCCCCCCCC;
+  GPIOI->AFR[1]  = 0x00000CC0;
+  /* Configure PIx pins in Alternate function mode */ 
+  GPIOI->MODER   = 0x0028AAAA;
+  /* Configure PIx pins speed to 50 MHz */ 
+  GPIOI->OSPEEDR = 0x0028AAAA;
+  /* Configure PIx pins Output type to push-pull */  
+  GPIOI->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PIx pins */ 
+  GPIOI->PUPDR   = 0x00000000;
+#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
+  
+/*-- FMC Configuration -------------------------------------------------------*/
+  /* Enable the FMC interface clock */
+  RCC->AHB3ENR |= 0x00000001;
+  /* Delay after an RCC peripheral clock enabling */
+  tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);
+
+  /* Configure and enable SDRAM bank1 */
+#if defined(STM32F446xx)
+  FMC_Bank5_6->SDCR[0] = 0x00001954;
+#else  
+  FMC_Bank5_6->SDCR[0] = 0x000019E4;
+#endif /* STM32F446xx */
+  FMC_Bank5_6->SDTR[0] = 0x01115351;      
+  
+  /* SDRAM initialization sequence */
+  /* Clock enable command */
+  FMC_Bank5_6->SDCMR = 0x00000011; 
+  tmpreg = FMC_Bank5_6->SDSR & 0x00000020; 
+  while((tmpreg != 0) && (timeout-- > 0))
+  {
+    tmpreg = FMC_Bank5_6->SDSR & 0x00000020; 
+  }
+
+  /* Delay */
+  for (index = 0; index<1000; index++);
+  
+  /* PALL command */
+  FMC_Bank5_6->SDCMR = 0x00000012;           
+  timeout = 0xFFFF;
+  while((tmpreg != 0) && (timeout-- > 0))
+  {
+    tmpreg = FMC_Bank5_6->SDSR & 0x00000020; 
+  }
+  
+  /* Auto refresh command */
+#if defined(STM32F446xx)
+  FMC_Bank5_6->SDCMR = 0x000000F3;
+#else  
+  FMC_Bank5_6->SDCMR = 0x00000073;
+#endif /* STM32F446xx */
+  timeout = 0xFFFF;
+  while((tmpreg != 0) && (timeout-- > 0))
+  {
+    tmpreg = FMC_Bank5_6->SDSR & 0x00000020; 
+  }
+ 
+  /* MRD register program */
+#if defined(STM32F446xx)
+  FMC_Bank5_6->SDCMR = 0x00044014;
+#else  
+  FMC_Bank5_6->SDCMR = 0x00046014;
+#endif /* STM32F446xx */
+  timeout = 0xFFFF;
+  while((tmpreg != 0) && (timeout-- > 0))
+  {
+    tmpreg = FMC_Bank5_6->SDSR & 0x00000020; 
+  } 
+  
+  /* Set refresh count */
+  tmpreg = FMC_Bank5_6->SDRTR;
+#if defined(STM32F446xx)
+  FMC_Bank5_6->SDRTR = (tmpreg | (0x0000050C<<1));
+#else    
+  FMC_Bank5_6->SDRTR = (tmpreg | (0x0000027C<<1));
+#endif /* STM32F446xx */
+  
+  /* Disable write protection */
+  tmpreg = FMC_Bank5_6->SDCR[0]; 
+  FMC_Bank5_6->SDCR[0] = (tmpreg & 0xFFFFFDFF);
+#endif /* DATA_IN_ExtSDRAM */
+#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
+
+#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)\
+ || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
+ || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx)
+
+#if defined(DATA_IN_ExtSRAM)
+/*-- GPIOs Configuration -----------------------------------------------------*/
+   /* Enable GPIOD, GPIOE, GPIOF and GPIOG interface clock */
+  RCC->AHB1ENR   |= 0x00000078;
+  /* Delay after an RCC peripheral clock enabling */
+  tmp = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIODEN);
+  
+  /* Connect PDx pins to FMC Alternate function */
+  GPIOD->AFR[0]  = 0x00CCC0CC;
+  GPIOD->AFR[1]  = 0xCCCCCCCC;
+  /* Configure PDx pins in Alternate function mode */  
+  GPIOD->MODER   = 0xAAAA0A8A;
+  /* Configure PDx pins speed to 100 MHz */  
+  GPIOD->OSPEEDR = 0xFFFF0FCF;
+  /* Configure PDx pins Output type to push-pull */  
+  GPIOD->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PDx pins */ 
+  GPIOD->PUPDR   = 0x00000000;
+
+  /* Connect PEx pins to FMC Alternate function */
+  GPIOE->AFR[0]  = 0xC00CC0CC;
+  GPIOE->AFR[1]  = 0xCCCCCCCC;
+  /* Configure PEx pins in Alternate function mode */ 
+  GPIOE->MODER   = 0xAAAA828A;
+  /* Configure PEx pins speed to 100 MHz */ 
+  GPIOE->OSPEEDR = 0xFFFFC3CF;
+  /* Configure PEx pins Output type to push-pull */  
+  GPIOE->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PEx pins */ 
+  GPIOE->PUPDR   = 0x00000000;
+
+  /* Connect PFx pins to FMC Alternate function */
+  GPIOF->AFR[0]  = 0x00CCCCCC;
+  GPIOF->AFR[1]  = 0xCCCC0000;
+  /* Configure PFx pins in Alternate function mode */   
+  GPIOF->MODER   = 0xAA000AAA;
+  /* Configure PFx pins speed to 100 MHz */ 
+  GPIOF->OSPEEDR = 0xFF000FFF;
+  /* Configure PFx pins Output type to push-pull */  
+  GPIOF->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PFx pins */ 
+  GPIOF->PUPDR   = 0x00000000;
+
+  /* Connect PGx pins to FMC Alternate function */
+  GPIOG->AFR[0]  = 0x00CCCCCC;
+  GPIOG->AFR[1]  = 0x000000C0;
+  /* Configure PGx pins in Alternate function mode */ 
+  GPIOG->MODER   = 0x00085AAA;
+  /* Configure PGx pins speed to 100 MHz */ 
+  GPIOG->OSPEEDR = 0x000CAFFF;
+  /* Configure PGx pins Output type to push-pull */  
+  GPIOG->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PGx pins */ 
+  GPIOG->PUPDR   = 0x00000000;
+  
+/*-- FMC/FSMC Configuration --------------------------------------------------*/
+  /* Enable the FMC/FSMC interface clock */
+  RCC->AHB3ENR         |= 0x00000001;
+
+#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
+  /* Delay after an RCC peripheral clock enabling */
+  tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);
+  /* Configure and enable Bank1_SRAM2 */
+  FMC_Bank1->BTCR[2]  = 0x00001011;
+  FMC_Bank1->BTCR[3]  = 0x00000201;
+  FMC_Bank1E->BWTR[2] = 0x0fffffff;
+#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */ 
+#if defined(STM32F469xx) || defined(STM32F479xx)
+  /* Delay after an RCC peripheral clock enabling */
+  tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);
+  /* Configure and enable Bank1_SRAM2 */
+  FMC_Bank1->BTCR[2]  = 0x00001091;
+  FMC_Bank1->BTCR[3]  = 0x00110212;
+  FMC_Bank1E->BWTR[2] = 0x0fffffff;
+#endif /* STM32F469xx || STM32F479xx */
+#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx)|| defined(STM32F417xx)\
+   || defined(STM32F412Zx) || defined(STM32F412Vx)
+  /* Delay after an RCC peripheral clock enabling */
+  tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FSMCEN);
+  /* Configure and enable Bank1_SRAM2 */
+  FSMC_Bank1->BTCR[2]  = 0x00001011;
+  FSMC_Bank1->BTCR[3]  = 0x00000201;
+  FSMC_Bank1E->BWTR[2] = 0x0FFFFFFF;
+#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F412Zx || STM32F412Vx */
+
+#endif /* DATA_IN_ExtSRAM */
+#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx ||\
+          STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx || STM32F412Zx || STM32F412Vx  */ 
+  (void)(tmp); 
+}
+#endif /* DATA_IN_ExtSRAM && DATA_IN_ExtSDRAM */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/examples/zephyr_example/CMakeLists.txt

@@ -0,0 +1,27 @@
+# SPDX-License-Identifier: Apache-2.0
+
+cmake_minimum_required(VERSION 3.20.0)
+
+find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE})
+project(zephyr_flasher)
+
+zephyr_compile_definitions_ifdef(CONFIG_SERIAL_FLASHER_MD5_ENABLED MD5_ENABLED)
+
+zephyr_library_sources(
+  ../common/example_common.c
+  )
+
+zephyr_library_include_directories(
+  ../common
+  ../binaries
+  )
+
+# Needed for example_common
+add_compile_definitions(SERIAL_FLASHER_INTERFACE_UART)
+
+# Embed binaries into the app.
+include(${CMAKE_CURRENT_LIST_DIR}/../common/bin2array.cmake)
+create_resources(${CMAKE_CURRENT_LIST_DIR}/../binaries/Hello-world ${CMAKE_BINARY_DIR}/binaries.c)
+set_property(SOURCE ${CMAKE_BINARY_DIR}/binaries.c PROPERTY GENERATED 1)
+
+target_sources(app PRIVATE src/main.c  ${CMAKE_BINARY_DIR}/binaries.c)

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/examples/zephyr_example/README.md

@@ -0,0 +1,84 @@
+# ESP32 Zephyr example
+
+## Overview
+
+This sample code demonstrates how to flash ESP32/ESP32-S2/ESP8266 from another (host) MCU using
+esp_serial_flash component API. In this case, ESP32 is also used as host MCU.
+Binaries to be flashed from host MCU to another Espressif SoC can be found in `binaries` folder
+and are converted into C-array during build process.
+
+Following steps are performed in order to re-program target's memory:
+
+1. Peripherals are initialized (GPIO for BOOT and EN pins and UART).
+2. UART1 (can be changed) through which new binary will be transfered is initialized.
+3. Host puts slave device into boot mode tries to connect by calling `esp_loader_connect()`.
+4. Binary file is opened and its size is acquired, as it has to be known before flashing.
+5. Then `esp_loader_flash_start()` is called to enter flashing mode and erase amount of memory to be flashed.
+6. `esp_loader_flash_write()` function is called repeatedly until the whole binary image is transfered.
+
+Note: In addition, to steps mentioned above, `esp_loader_change_transmission_rate`  is called after connection
+is established in order to increase flashing speed. This does not apply for ESP8266, as its bootloader
+does not support this command. However, ESP8266 is capable of detecting baud rate during connection
+phase, and can be changed before calling `esp_loader_connect`, if necessary.
+
+## Hardware Required
+
+* Two development boards with ESP32 SoC (e.g., ESP32-DevKitC, ESP-WROVER-KIT, etc.).
+* One or two USB cables for power supply and programming.
+
+## Hardware connection
+
+Table below shows connection between two ESP32 devices.
+
+| ESP32 (host) | ESP32 (slave) |
+|:------------:|:-------------:|
+|    IO4       |      IO0      |
+|    IO2       |     RESET     |
+|    IO9       |      TX0      |
+|    IO10      |      RX0      |
+
+Note: interconnection is the same for all three targets (slaves).
+
+## Build and flash
+
+To run the example, type the following command:
+
+```c
+west build -p -b esp32
+west flash
+west espressif monitor
+```
+
+(To exit the serial monitor, type ``ctrl-c``.)
+
+For more information, check [Zephyr's Getting Started](https://docs.zephyrproject.org/latest/develop/getting_started/index.html)
+
+## Configuration
+
+For details about available configuration option, please refer to top level [README.md](../../README.md).
+Compile definitions can be specified in `prj.conf` file.
+
+Binaries to be flashed are placed in separate folder (binaries.c) for each possible target and converted to C-array. Without explicitly enabling MD5 check, flash integrity verification is disabled by default.
+
+## Example output
+
+Here is the example's console output:
+
+```
+*** Booting Zephyr OS build zephyr-v3.2.0-3548-ga1bb9c9d1736 ***
+Running ESP Flasher from Zephyr
+Connected to target
+Baudrate changed
+Erasing flash (this may take a while)...
+Start programming
+Progress: 100 %
+Finished programming
+Erasing flash (this may take a while)...
+Start programming
+Progress: 100 %
+Finished programming
+Erasing flash (this may take a while)...
+Start programming
+Progress: 100 %
+Finished programming
+```

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/examples/zephyr_example/boards/esp32.overlay

@@ -0,0 +1,34 @@
+/*
+ * Copyright (c) 2022 Espressif Systems (Shanghai) Co., Ltd.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <zephyr/dt-bindings/pinctrl/esp-pinctrl-common.h>
+#include <dt-bindings/pinctrl/esp32-pinctrl.h>
+#include <zephyr/dt-bindings/pinctrl/esp32-gpio-sigmap.h>
+
+/ {
+	aliases {
+		en = &en_button;
+		boot = &boot_button;
+		uart1 = &uart1;
+	};
+
+	gpio_keys {
+		compatible = "gpio-keys";
+		en_button: en_button {
+			gpios = <&gpio0 2 (GPIO_PULL_UP | GPIO_ACTIVE_HIGH)>;
+		};
+		boot_button: boot_button {
+			gpios = <&gpio0 4 (GPIO_PULL_UP | GPIO_ACTIVE_HIGH)>;
+		};
+	};
+};
+
+&uart1 {
+	status = "okay";
+	current-speed = <115200>;
+	pinctrl-0 = <&uart1_default>;
+	pinctrl-names = "default";
+};

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/examples/zephyr_example/prj.conf

@@ -0,0 +1,4 @@
+# nothing here
+CONFIG_CONSOLE=y
+CONFIG_CONSOLE_GETCHAR=y
+CONFIG_NEWLIB_LIBC=y

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/examples/zephyr_example/sample.yaml

@@ -0,0 +1,7 @@
+sample:
+  description: ESP Serial Flasher sample code
+  name: zephyr_flasher
+tests:
+  sample.esp_flasher.zephyr_example:
+    platform_allow: esp32
+    tags: esp32

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/examples/zephyr_example/src/main.c

@@ -0,0 +1,81 @@
+/*
+ * ESP Flasher Library Example for Zephyr
+ * Written in 2022 by KT-Elektronik, Klaucke und Partner GmbH
+ * This example code is in the Public Domain (or CC0 licensed, at your option.)
+ * Unless required by applicable law or agreed to in writing, this
+ * software is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
+ * CONDITIONS OF ANY KIND, either express or implied.
+ *
+ * Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
+ */
+
+#include <zephyr/kernel.h>
+#include <zephyr/device.h>
+#include <zephyr/devicetree.h>
+#include <zephyr/drivers/gpio.h>
+#include <zephyr/sys/util.h>
+
+#include <stdio.h>
+#include <string.h>
+#include <zephyr_port.h>
+#include <esp_loader.h>
+#include "example_common.h"
+
+#define HIGHER_BAUDRATE 230400
+#define DEFAULT_BAUDRATE 115200
+
+/* Get UART DTS entry used as flash interface */
+static const struct device *esp_uart_dev = DEVICE_DT_GET(DT_ALIAS(uart1));
+/* Get GPIO pin connected to the ESP's enable pin. */
+static const struct gpio_dt_spec esp_enable_spec = GPIO_DT_SPEC_GET(DT_ALIAS(en), gpios);
+/* Get GPIO pin  connected to the ESP's boot pin. */
+static const struct gpio_dt_spec esp_boot_spec = GPIO_DT_SPEC_GET(DT_ALIAS(boot), gpios);
+
+void main(void)
+{
+	example_binaries_t bin;
+
+	const loader_zephyr_config_t config = {
+		.uart_dev = esp_uart_dev,
+		.enable_spec = esp_enable_spec,
+		.boot_spec = esp_boot_spec
+	};
+
+	printk("Running ESP Flasher from Zephyr\r\n");
+
+	if (!device_is_ready(esp_uart_dev)) {
+		printk("ESP UART not ready");
+		return;
+	}
+
+	if (!device_is_ready(esp_boot_spec.port)) {
+		printk("ESP boot GPIO not ready");
+		return;
+	}
+
+	if (!device_is_ready(esp_enable_spec.port)) {
+		printk("Bluetooth Enable GPIO not ready");
+		return;
+	}
+
+	gpio_pin_configure_dt(&esp_boot_spec, GPIO_OUTPUT_ACTIVE);
+	gpio_pin_configure_dt(&esp_enable_spec, GPIO_OUTPUT_INACTIVE);
+
+	if (loader_port_zephyr_init(&config) != ESP_LOADER_SUCCESS) {
+		printk("ESP loader init failed");
+		return;
+	}
+
+	if (connect_to_target(HIGHER_BAUDRATE) == ESP_LOADER_SUCCESS) {
+
+		get_example_binaries(esp_loader_get_target(), &bin);
+
+		flash_binary(bin.boot.data, bin.boot.size, bin.boot.addr);
+		flash_binary(bin.part.data, bin.part.size, bin.part.addr);
+		flash_binary(bin.app.data,  bin.app.size,  bin.app.addr);
+	}
+
+	loader_port_change_transmission_rate(DEFAULT_BAUDRATE);
+
+	loader_port_reset_target();
+}

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/idf_component.yml

@@ -0,0 +1,3 @@
+version: "0.3.1"
+description: Serial flasher component provides portable library for flashing or loading ram loadble app to Espressif SoCs from other host microcontroller
+url: https://github.com/espressif/esp-serial-flasher

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/include/esp32_port.h

@@ -0,0 +1,59 @@
+/* Copyright 2020-2023 Espressif Systems (Shanghai) CO LTD
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+ #pragma once
+
+#include "esp_loader_io.h"
+#include "freertos/FreeRTOS.h"
+#include "freertos/queue.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct
+{
+  uint32_t baud_rate;     /*!< Initial baud rate, can be changed later */
+  uint32_t uart_port;     /*!< UART port */
+  uint32_t uart_rx_pin;   /*!< This pin will be configured as UART Rx pin */
+  uint32_t uart_tx_pin;   /*!< This pin will be configured as UART Tx pin */
+  uint32_t reset_trigger_pin; /*!< This pin will be used to reset target chip */
+  uint32_t gpio0_trigger_pin; /*!< This pin will be used to toggle set IO0 of target chip */
+  uint32_t rx_buffer_size;    /*!< Set to zero for default RX buffer size */
+  uint32_t tx_buffer_size;    /*!< Set to zero for default TX buffer size */
+  uint32_t queue_size;        /*!< Set to zero for default UART queue size */
+  QueueHandle_t *uart_queue;  /*!< Set to NULL, if UART queue handle is not
+                                   necessary. Otherwise, it will be assigned here */
+} loader_esp32_config_t;
+
+/**
+  * @brief Initializes serial interface.
+  *
+  * @param baud_rate[in]       Communication speed.
+  *
+  * @return
+  *     - ESP_LOADER_SUCCESS Success
+  *     - ESP_LOADER_ERROR_FAIL Initialization failure
+  */
+esp_loader_error_t loader_port_esp32_init(const loader_esp32_config_t *config);
+
+/**
+  * @brief Deinitialize serial interface.
+  */
+void loader_port_esp32_deinit(void);
+
+#ifdef __cplusplus
+}
+#endif

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/include/esp_loader.h

@@ -0,0 +1,299 @@
+/* Copyright 2020-2023 Espressif Systems (Shanghai) CO LTD
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Used for backwards compatibility with the previous API */
+#define esp_loader_change_baudrate esp_loader_change_transmission_rate
+
+/**
+ * Macro which can be used to check the error code,
+ * and return in case the code is not ESP_LOADER_SUCCESS.
+ */
+#define RETURN_ON_ERROR(x) do {         \
+    esp_loader_error_t _err_ = (x);     \
+    if (_err_ != ESP_LOADER_SUCCESS) {  \
+        return _err_;                   \
+    }                                   \
+} while(0)
+
+/**
+ * @brief Error codes
+ */
+typedef enum {
+    ESP_LOADER_SUCCESS,                /*!< Success */
+    ESP_LOADER_ERROR_FAIL,             /*!< Unspecified error */
+    ESP_LOADER_ERROR_TIMEOUT,          /*!< Timeout elapsed */
+    ESP_LOADER_ERROR_IMAGE_SIZE,       /*!< Image size to flash is larger than flash size */
+    ESP_LOADER_ERROR_INVALID_MD5,      /*!< Computed and received MD5 does not match */
+    ESP_LOADER_ERROR_INVALID_PARAM,    /*!< Invalid parameter passed to function */
+    ESP_LOADER_ERROR_INVALID_TARGET,   /*!< Connected target is invalid */
+    ESP_LOADER_ERROR_UNSUPPORTED_CHIP, /*!< Attached chip is not supported */
+    ESP_LOADER_ERROR_UNSUPPORTED_FUNC, /*!< Function is not supported on attached target */
+    ESP_LOADER_ERROR_INVALID_RESPONSE  /*!< Internal error */
+} esp_loader_error_t;
+
+/**
+ * @brief Supported targets
+ */
+typedef enum {
+    ESP8266_CHIP = 0,
+    ESP32_CHIP   = 1,
+    ESP32S2_CHIP = 2,
+    ESP32C3_CHIP = 3,
+    ESP32S3_CHIP = 4,
+    ESP32C2_CHIP = 5,
+    ESP32H4_CHIP = 6,
+    ESP32H2_CHIP = 7,
+    ESP32C6_CHIP = 8,
+    ESP_MAX_CHIP = 9,
+    ESP_UNKNOWN_CHIP = 9
+} target_chip_t;
+
+/**
+ * @brief Application binary header
+ */
+typedef struct {
+  uint8_t magic;
+  uint8_t segments;
+  uint8_t flash_mode;
+  uint8_t flash_size_freq;
+  uint32_t entrypoint;
+} esp_loader_bin_header_t;
+
+/**
+ * @brief Segment binary header
+ */
+typedef struct {
+    uint32_t addr;
+    uint32_t size;
+    uint8_t *data;
+} esp_loader_bin_segment_t;
+
+/**
+ * @brief Connection arguments
+ */
+typedef struct {
+    uint32_t sync_timeout;  /*!< Maximum time to wait for response from serial interface. */
+    int32_t trials;         /*!< Number of trials to connect to target. If greater than 1,
+                               100 millisecond delay is inserted after each try. */
+} esp_loader_connect_args_t;
+
+#define ESP_LOADER_CONNECT_DEFAULT() { \
+  .sync_timeout = 100, \
+  .trials = 10, \
+}
+
+/**
+  * @brief Connects to the target
+  *
+  * @param connect_args[in] Timing parameters to be used for connecting to target.
+  *
+  * @return
+  *     - ESP_LOADER_SUCCESS Success
+  *     - ESP_LOADER_ERROR_TIMEOUT Timeout
+  *     - ESP_LOADER_ERROR_INVALID_RESPONSE Internal error
+  */
+esp_loader_error_t esp_loader_connect(esp_loader_connect_args_t *connect_args);
+
+/**
+  * @brief   Returns attached target chip.
+  *
+  * @warning This function can only be called after connection with target
+  *          has been successfully established by calling esp_loader_connect().
+  *
+  * @return  One of target_chip_t
+  */
+target_chip_t esp_loader_get_target(void);
+
+
+#ifdef SERIAL_FLASHER_INTERFACE_UART
+/**
+  * @brief Initiates flash operation
+  *
+  * @param offset[in]       Address from which flash operation will be performed.
+  * @param image_size[in]   Size of the whole binary to be loaded into flash.
+  * @param block_size[in]   Size of buffer used in subsequent calls to esp_loader_flash_write.
+  *
+  * @note  image_size is size of the whole image, whereas, block_size is chunk of data sent
+  *        to the target, each time esp_loader_flash_write function is called.
+  *
+  * @return
+  *     - ESP_LOADER_SUCCESS Success
+  *     - ESP_LOADER_ERROR_TIMEOUT Timeout
+  *     - ESP_LOADER_ERROR_INVALID_RESPONSE Internal error
+  */
+esp_loader_error_t esp_loader_flash_start(uint32_t offset, uint32_t image_size, uint32_t block_size);
+
+/**
+  * @brief Writes supplied data to target's flash memory.
+  *
+  * @param payload[in]      Data to be flashed into target's memory.
+  * @param size[in]         Size of payload in bytes.
+  *
+  * @note  size must not be greater that block_size supplied to previously called
+  *        esp_loader_flash_start function. If size is less than block_size,
+  *        remaining bytes of payload buffer will be padded with 0xff.
+  *        Therefore, size of payload buffer has to be equal or greater than block_size.
+  *
+  * @return
+  *     - ESP_LOADER_SUCCESS Success
+  *     - ESP_LOADER_ERROR_TIMEOUT Timeout
+  *     - ESP_LOADER_ERROR_INVALID_RESPONSE Internal error
+  */
+esp_loader_error_t esp_loader_flash_write(void *payload, uint32_t size);
+
+/**
+  * @brief Ends flash operation.
+  *
+  * @param reboot[in]       reboot the target if true.
+  *
+  * @return
+  *     - ESP_LOADER_SUCCESS Success
+  *     - ESP_LOADER_ERROR_TIMEOUT Timeout
+  *     - ESP_LOADER_ERROR_INVALID_RESPONSE Internal error
+  */
+esp_loader_error_t esp_loader_flash_finish(bool reboot);
+#endif /* SERIAL_FLASHER_INTERFACE_UART */
+
+
+/**
+  * @brief Initiates mem operation, initiates loading for program into target RAM
+  *
+  * @param offset[in]       Address from which mem operation will be performed.
+  * @param size[in]         Size of the whole binary to be loaded into mem.
+  * @param block_size[in]   Size of buffer used in subsequent calls to esp_loader_mem_write.
+  *
+  * @note  image_size is size of the whole image, whereas, block_size is chunk of data sent
+  *        to the target, each time esp_mem_flash_write function is called.
+  *
+  * @return
+  *     - ESP_LOADER_SUCCESS Success
+  *     - ESP_LOADER_ERROR_TIMEOUT Timeout
+  *     - ESP_LOADER_ERROR_INVALID_RESPONSE Internal error
+  */
+esp_loader_error_t esp_loader_mem_start(uint32_t offset, uint32_t size, uint32_t block_size);
+
+
+/**
+  * @brief Writes supplied data to target's mem memory.
+  *
+  * @param payload[in]      Data to be loaded into target's memory.
+  * @param size[in]         Size of data in bytes.
+  *
+  * @note  size must not be greater that block_size supplied to previously called
+  *        esp_loader_mem_start function.
+  *        Therefore, size of data buffer has to be equal or greater than block_size.
+  *
+  * @return
+  *     - ESP_LOADER_SUCCESS Success
+  *     - ESP_LOADER_ERROR_TIMEOUT Timeout
+  *     - ESP_LOADER_ERROR_INVALID_RESPONSE Internal error
+  */
+esp_loader_error_t esp_loader_mem_write(const void *payload, uint32_t size);
+
+
+/**
+  * @brief Ends mem operation, finish loading for program into target RAM
+  *        and send the entrypoint of ram_loadable app
+  *
+  * @param entrypoint[in]       entrypoint of ram program.
+  *
+  * @return
+  *     - ESP_LOADER_SUCCESS Success
+  *     - ESP_LOADER_ERROR_TIMEOUT Timeout
+  *     - ESP_LOADER_ERROR_INVALID_RESPONSE Internal error
+  */
+esp_loader_error_t esp_loader_mem_finish(uint32_t entrypoint);
+
+
+/**
+  * @brief Writes register.
+  *
+  * @param address[in]      Address of register.
+  * @param reg_value[in]    New register value.
+  *
+  * @return
+  *     - ESP_LOADER_SUCCESS Success
+  *     - ESP_LOADER_ERROR_TIMEOUT Timeout
+  *     - ESP_LOADER_ERROR_INVALID_RESPONSE Internal error
+  */
+esp_loader_error_t esp_loader_write_register(uint32_t address, uint32_t reg_value);
+
+/**
+  * @brief Reads register.
+  *
+  * @param address[in]      Address of register.
+  * @param reg_value[out]   Register value.
+  *
+  * @return
+  *     - ESP_LOADER_SUCCESS Success
+  *     - ESP_LOADER_ERROR_TIMEOUT Timeout
+  *     - ESP_LOADER_ERROR_INVALID_RESPONSE Internal error
+  */
+esp_loader_error_t esp_loader_read_register(uint32_t address, uint32_t *reg_value);
+
+/**
+  * @brief Change baud rate.
+  *
+  * @note  Baud rate has to be also adjusted accordingly on host MCU, as
+  *        target's baud rate is changed upon return from this function.
+  *
+  * @param transmission_rate[in]     new baud rate to be set.
+  *
+  * @return
+  *     - ESP_LOADER_SUCCESS Success
+  *     - ESP_LOADER_ERROR_TIMEOUT Timeout
+  *     - ESP_LOADER_ERROR_INVALID_RESPONSE Internal error
+  *     - ESP_LOADER_ERROR_UNSUPPORTED_FUNC Unsupported on the target
+  */
+esp_loader_error_t esp_loader_change_transmission_rate(uint32_t transmission_rate);
+
+/**
+  * @brief Verify target's flash integrity by checking MD5.
+  *        MD5 checksum is computed from data pushed to target's memory by calling
+  *        esp_loader_flash_write() function and compared against target's MD5.
+  *        Target computes checksum based on offset and image_size passed to
+  *        esp_loader_flash_start() function.
+  *
+  * @note  This function is only available if MD5_ENABLED is set.
+  *
+  * @return
+  *     - ESP_LOADER_SUCCESS Success
+  *     - ESP_LOADER_ERROR_INVALID_MD5 MD5 does not match
+  *     - ESP_LOADER_ERROR_TIMEOUT Timeout
+  *     - ESP_LOADER_ERROR_INVALID_RESPONSE Internal error
+  *     - ESP_LOADER_ERROR_UNSUPPORTED_FUNC Unsupported on the target
+  */
+#if MD5_ENABLED
+esp_loader_error_t esp_loader_flash_verify(void);
+#endif
+/**
+  * @brief Toggles reset pin.
+  */
+void esp_loader_reset_target(void);
+
+
+
+#ifdef __cplusplus
+}
+#endif

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/include/esp_loader_io.h

@@ -0,0 +1,112 @@
+/* Copyright 2020-2023 Espressif Systems (Shanghai) CO LTD
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+ #pragma once
+
+#include <stdint.h>
+#include "esp_loader.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+  * @brief Changes the transmission rate of the used peripheral.
+  */
+esp_loader_error_t loader_port_change_transmission_rate(uint32_t transmission_rate);
+
+/**
+  * @brief Writes data over the io interface.
+  *
+  * @param data[in]     Buffer with data to be written.
+  * @param size[in]     Size of data in bytes.
+  * @param timeout[in]  Timeout in milliseconds.
+  *
+  * @return
+  *     - ESP_LOADER_SUCCESS Success
+  *     - ESP_LOADER_ERROR_TIMEOUT Timeout elapsed
+  */
+esp_loader_error_t loader_port_write(const uint8_t *data, uint16_t size, uint32_t timeout);
+
+/**
+  * @brief Reads data from the io interface.
+  *
+  * @param data[out]    Buffer into which received data will be written.
+  * @param size[in]     Number of bytes to read.
+  * @param timeout[in]  Timeout in milliseconds.
+  *
+  * @return
+  *     - ESP_LOADER_SUCCESS Success
+  *     - ESP_LOADER_ERROR_TIMEOUT Timeout elapsed
+  */
+esp_loader_error_t loader_port_read(uint8_t *data, uint16_t size, uint32_t timeout);
+
+/**
+  * @brief Delay in milliseconds.
+  *
+  * @param ms[in]   Number of milliseconds.
+  *
+  */
+void loader_port_delay_ms(uint32_t ms);
+
+/**
+  * @brief Starts timeout timer.
+  *
+  * @param ms[in]   Number of milliseconds.
+  *
+  */
+void loader_port_start_timer(uint32_t ms);
+
+/**
+  * @brief Returns remaining time since timer was started by calling esp_loader_start_timer.
+  *        0 if timer has elapsed.
+  *
+  * @return   Number of milliseconds.
+  *
+  */
+uint32_t loader_port_remaining_time(void);
+
+/**
+  * @brief Asserts bootstrap pins to enter boot mode and toggles reset pin.
+  *
+  * @note  Reset pin should stay asserted for at least 20 milliseconds.
+  */
+void loader_port_enter_bootloader(void);
+
+/**
+  * @brief Toggles reset pin.
+  *
+  * @note  Reset pin should stay asserted for at least 20 milliseconds.
+  */
+void loader_port_reset_target(void);
+
+/**
+  * @brief Function can be defined by user to print debug message.
+  *
+  * @note  Empty weak function is used, otherwise.
+  *
+  */
+void loader_port_debug_print(const char *str);
+
+#ifdef SERIAL_FLASHER_INTERFACE_SPI
+/**
+  * @brief Sets the chip select to a defined level
+  */
+void loader_port_spi_set_cs(uint32_t level);
+#endif /* SERIAL_FLASHER_INTERFACE_SPI */
+
+#ifdef __cplusplus
+}
+#endif

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/include/esp_targets.h

@@ -0,0 +1,33 @@
+/* Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#pragma once
+
+#include <stdint.h>
+#include "esp_loader.h"
+
+typedef struct {
+    uint32_t cmd;
+    uint32_t usr;
+    uint32_t usr1;
+    uint32_t usr2;
+    uint32_t w0;
+    uint32_t mosi_dlen;
+    uint32_t miso_dlen;
+} target_registers_t;
+
+esp_loader_error_t loader_detect_chip(target_chip_t *target, const target_registers_t **regs);
+esp_loader_error_t loader_read_spi_config(target_chip_t target_chip, uint32_t *spi_config);
+bool encryption_in_begin_flash_cmd(target_chip_t target);

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/include/example_common.h

@@ -0,0 +1,63 @@
+/* Copyright 2020-2023 Espressif Systems (Shanghai) CO LTD
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#pragma once
+
+#define BIN_FIRST_SEGMENT_OFFSET    0x18
+// Maximum block sized for RAM and Flash writes, respectively.
+#define ESP_RAM_BLOCK               0x1800
+
+typedef struct {
+    const uint8_t *data;
+    uint32_t size;
+    uint32_t addr;
+} partition_attr_t;
+
+typedef struct {
+    partition_attr_t boot;
+    partition_attr_t part;
+    partition_attr_t app;
+} example_binaries_t;
+
+typedef struct {
+    partition_attr_t ram_app;
+} example_ram_app_binary_t;
+
+/**
+ * @brief esptool portable bin header format
+ */
+typedef struct example_bin_header {
+    uint8_t magic;
+    uint8_t segments;
+    uint8_t flash_mode;
+    uint8_t flash_size_freq;
+    uint32_t entrypoint;
+} example_bin_header_t;
+
+/**
+ * @brief esptool portable bin segment format
+ */
+typedef struct example_bin_segment {
+    uint32_t addr;
+    uint32_t size;
+    uint8_t *data;
+} example_bin_segment_t;
+
+
+void get_example_binaries(target_chip_t target, example_binaries_t *binaries);
+void get_example_ram_app_binary(target_chip_t target, example_ram_app_binary_t *bin);
+esp_loader_error_t connect_to_target(uint32_t higher_transmission_rate);
+esp_loader_error_t flash_binary(const uint8_t *bin, size_t size, size_t address);
+esp_loader_error_t load_ram_binary(const uint8_t *bin);

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/include/md5_hash.h

@@ -0,0 +1,28 @@
+/*
+ * MD5 hash implementation and interface functions
+ * Copyright (c) 2003-2005, Jouni Malinen <j@w1.fi>
+ *
+ * This software may be distributed under the terms of the BSD license.
+ * See README for more details.
+ */
+
+#pragma once
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+struct MD5Context {
+	uint32_t buf[4];
+	uint32_t bits[2];
+	uint8_t in[64];
+};
+
+void MD5Init(struct MD5Context *context);
+void MD5Update(struct MD5Context *context, unsigned char const *buf, unsigned len);
+void MD5Final(unsigned char digest[16], struct MD5Context *context);
+
+#ifdef __cplusplus
+}
+#endif

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/include/protocol.h

@@ -0,0 +1,236 @@
+/* Copyright 2020-2023 Espressif Systems (Shanghai) CO LTD
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "esp_loader.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define STATUS_FAILURE  1
+#define STATUS_SUCCESS  0
+
+#define READ_DIRECTION  1
+#define WRITE_DIRECTION 0
+
+#define MD5_SIZE 32
+
+typedef enum __attribute__((packed))
+{
+    FLASH_BEGIN = 0x02,
+    FLASH_DATA  = 0x03,
+    FLASH_END   = 0x04,
+    MEM_BEGIN   = 0x05,
+    MEM_END     = 0x06,
+    MEM_DATA    = 0x07,
+    SYNC        = 0x08,
+    WRITE_REG   = 0x09,
+    READ_REG    = 0x0a,
+
+    SPI_SET_PARAMS   = 0x0b,
+    SPI_ATTACH       = 0x0d,
+    CHANGE_BAUDRATE  = 0x0f,
+    FLASH_DEFL_BEGIN = 0x10,
+    FLASH_DEFL_DATA  = 0x11,
+    FLASH_DEFL_END   = 0x12,
+    SPI_FLASH_MD5    = 0x13,
+} command_t;
+
+typedef enum __attribute__((packed))
+{
+    RESPONSE_OK     = 0x00,
+    INVALID_COMMAND = 0x05, // parameters or length field is invalid
+    COMMAND_FAILED  = 0x06, // Failed to act on received message
+    INVALID_CRC     = 0x07, // Invalid CRC in message
+    FLASH_WRITE_ERR = 0x08, // After writing a block of data to flash, the ROM loader reads the value back and the 8-bit CRC is compared to the data read from flash. If they don't match, this error is returned.
+    FLASH_READ_ERR  = 0x09, // SPI read failed
+    READ_LENGTH_ERR = 0x0a, // SPI read request length is too long
+    DEFLATE_ERROR   = 0x0b, // ESP32 compressed uploads only
+} error_code_t;
+
+typedef struct __attribute__((packed))
+{
+    uint8_t direction;
+    uint8_t command;    // One of command_t
+    uint16_t size;
+    uint32_t checksum;
+} command_common_t;
+
+typedef struct __attribute__((packed))
+{
+    command_common_t common;
+    uint32_t erase_size;
+    uint32_t packet_count;
+    uint32_t packet_size;
+    uint32_t offset;
+    uint32_t encrypted;
+} flash_begin_command_t;
+
+typedef struct __attribute__((packed))
+{
+    command_common_t common;
+    uint32_t data_size;
+    uint32_t sequence_number;
+    uint32_t zero_0;
+    uint32_t zero_1;
+} data_command_t;
+
+typedef struct __attribute__((packed))
+{
+    command_common_t common;
+    uint32_t stay_in_loader;
+} flash_end_command_t;
+
+typedef struct __attribute__((packed))
+{
+    command_common_t common;
+    uint32_t total_size;
+    uint32_t blocks;
+    uint32_t block_size;
+    uint32_t offset;
+} mem_begin_command_t;
+
+typedef struct __attribute__((packed))
+{
+    command_common_t common;
+    uint32_t stay_in_loader;
+    uint32_t entry_point_address;
+} mem_end_command_t;
+
+typedef struct __attribute__((packed))
+{
+    command_common_t common;
+    uint8_t sync_sequence[36];
+} sync_command_t;
+
+typedef struct __attribute__((packed))
+{
+    command_common_t common;
+    uint32_t address;
+    uint32_t value;
+    uint32_t mask;
+    uint32_t delay_us;
+} write_reg_command_t;
+
+typedef struct __attribute__((packed))
+{
+    command_common_t common;
+    uint32_t address;
+} read_reg_command_t;
+
+typedef struct __attribute__((packed))
+{
+    command_common_t common;
+    uint32_t configuration;
+    uint32_t zero; // ESP32 ROM only
+} spi_attach_command_t;
+
+typedef struct __attribute__((packed))
+{
+    command_common_t common;
+    uint32_t new_baudrate;
+    uint32_t old_baudrate;
+} change_baudrate_command_t;
+
+typedef struct __attribute__((packed))
+{
+    command_common_t common;
+    uint32_t address;
+    uint32_t size;
+    uint32_t reserved_0;
+    uint32_t reserved_1;
+} spi_flash_md5_command_t;
+
+typedef struct __attribute__((packed))
+{
+    uint8_t direction;
+    uint8_t command;    // One of command_t
+    uint16_t size;
+    uint32_t value;
+} common_response_t;
+
+typedef struct __attribute__((packed))
+{
+    uint8_t failed;
+    uint8_t error;
+} response_status_t;
+
+typedef struct __attribute__((packed))
+{
+    common_response_t common;
+    response_status_t status;
+} response_t;
+
+typedef struct __attribute__((packed))
+{
+    common_response_t common;
+    uint8_t md5[MD5_SIZE];     // ROM only
+    response_status_t status;
+} rom_md5_response_t;
+
+typedef struct __attribute__((packed))
+{
+    command_common_t common;
+    uint32_t id;
+    uint32_t total_size;
+    uint32_t block_size;
+    uint32_t sector_size;
+    uint32_t page_size;
+    uint32_t status_mask;
+} write_spi_command_t;
+
+esp_loader_error_t loader_initialize_conn(esp_loader_connect_args_t *connect_args);
+
+#ifdef SERIAL_FLASHER_INTERFACE_UART
+esp_loader_error_t loader_flash_begin_cmd(uint32_t offset, uint32_t erase_size, uint32_t block_size, uint32_t blocks_to_write, bool encryption);
+
+esp_loader_error_t loader_flash_data_cmd(const uint8_t *data, uint32_t size);
+
+esp_loader_error_t loader_flash_end_cmd(bool stay_in_loader);
+
+esp_loader_error_t loader_sync_cmd(void);
+
+esp_loader_error_t loader_spi_attach_cmd(uint32_t config);
+
+esp_loader_error_t loader_md5_cmd(uint32_t address, uint32_t size, uint8_t *md5_out);
+
+esp_loader_error_t loader_spi_parameters(uint32_t total_size);
+#endif /* SERIAL_FLASHER_INTERFACE_UART */
+
+esp_loader_error_t loader_mem_begin_cmd(uint32_t offset, uint32_t size, uint32_t blocks_to_write, uint32_t block_size);
+
+esp_loader_error_t loader_mem_data_cmd(const uint8_t *data, uint32_t size);
+
+esp_loader_error_t loader_mem_end_cmd(uint32_t entrypoint);
+
+esp_loader_error_t loader_mem_begin_cmd(uint32_t offset, uint32_t size, uint32_t blocks_to_write, uint32_t block_size);
+
+esp_loader_error_t loader_mem_data_cmd(const uint8_t *data, uint32_t size);
+
+esp_loader_error_t loader_mem_end_cmd(uint32_t entrypoint);
+
+esp_loader_error_t loader_write_reg_cmd(uint32_t address, uint32_t value, uint32_t mask, uint32_t delay_us);
+
+esp_loader_error_t loader_read_reg_cmd(uint32_t address, uint32_t *reg);
+
+esp_loader_error_t loader_change_baudrate_cmd(uint32_t baudrate);
+
+#ifdef __cplusplus
+}
+#endif

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/include/protocol_prv.h

@@ -0,0 +1,31 @@
+/* Copyright 2020-2023 Espressif Systems (Shanghai) CO LTD
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+#include <stddef.h>
+#include "esp_loader.h"
+#include "protocol.h"
+
+void log_loader_internal_error(error_code_t error);
+
+esp_loader_error_t send_cmd(const void *cmd_data, uint32_t size, uint32_t *reg_value);
+
+esp_loader_error_t send_cmd_with_data(const void *cmd_data, size_t cmd_size,
+                                      const void *data, size_t data_size);
+
+esp_loader_error_t send_cmd_md5(const void *cmd_data, size_t cmd_size, uint8_t md5_out[MD5_SIZE]);

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/include/serial_io.h

@@ -0,0 +1,24 @@
+/* Copyright 2020-2023 Espressif Systems (Shanghai) CO LTD
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#warning Please replace serial_io.h with esp_loader_io.h and change the function names \
+         to match the new API
+
+/* Defines used to avoid breaking existing ports */
+#define loader_port_change_baudrate loader_port_change_transmission_rate
+#define loader_port_serial_write loader_port_write
+#define loader_port_serial_read loader_port_read
+
+#include "esp_loader_io.h"

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/include/slip.h

@@ -0,0 +1,28 @@
+/* Copyright 2020-2023 Espressif Systems (Shanghai) CO LTD
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#pragma once
+
+#include "esp_loader.h"
+#include <stdint.h>
+#include <stdlib.h>
+
+esp_loader_error_t SLIP_receive_data(uint8_t *buff, size_t size);
+
+esp_loader_error_t SLIP_receive_packet(uint8_t *buff, size_t size);
+
+esp_loader_error_t SLIP_send(const uint8_t *data, size_t size);
+
+esp_loader_error_t SLIP_send_delimiter(void);

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/src/esp32_port.c

@@ -0,0 +1,181 @@
+/* Copyright 2020-2023 Espressif Systems (Shanghai) CO LTD
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "esp32_port.h"
+#include "driver/uart.h"
+#include "driver/gpio.h"
+#include "esp_timer.h"
+#include "esp_log.h"
+#include "esp_idf_version.h"
+#include <unistd.h>
+
+#ifdef SERIAL_FLASHER_DEBUG_TRACE
+static void transfer_debug_print(const uint8_t *data, uint16_t size, bool write)
+{
+    static bool write_prev = false;
+
+    if (write_prev != write) {
+        write_prev = write;
+        printf("\n--- %s ---\n", write ? "WRITE" : "READ");
+    }
+
+    for (uint32_t i = 0; i < size; i++) {
+        printf("%02x ", data[i]);
+    }
+}
+#endif
+
+static int64_t s_time_end;
+static int32_t s_uart_port;
+static int32_t s_reset_trigger_pin;
+static int32_t s_gpio0_trigger_pin;
+
+esp_loader_error_t loader_port_esp32_init(const loader_esp32_config_t *config)
+{
+    s_uart_port = config->uart_port;
+    s_reset_trigger_pin = config->reset_trigger_pin;
+    s_gpio0_trigger_pin = config->gpio0_trigger_pin;
+
+    // Initialize UART
+    uart_config_t uart_config = {
+        .baud_rate = config->baud_rate,
+        .data_bits = UART_DATA_8_BITS,
+        .parity    = UART_PARITY_DISABLE,
+        .stop_bits = UART_STOP_BITS_1,
+        .flow_ctrl = UART_HW_FLOWCTRL_DISABLE,
+#if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(5, 0, 0)
+        .source_clk = UART_SCLK_DEFAULT,
+#endif
+    };
+
+    int rx_buffer_size = config->rx_buffer_size ? config->rx_buffer_size : 400;
+    int tx_buffer_size = config->tx_buffer_size ? config->tx_buffer_size : 400;
+    QueueHandle_t *uart_queue = config->uart_queue ? config->uart_queue : NULL;
+    int queue_size = config->queue_size ? config->queue_size : 0;
+
+    if ( uart_param_config(s_uart_port, &uart_config) != ESP_OK ) {
+        return ESP_LOADER_ERROR_FAIL;
+    }
+    if ( uart_set_pin(s_uart_port, config->uart_tx_pin, config->uart_rx_pin, UART_PIN_NO_CHANGE, UART_PIN_NO_CHANGE) != ESP_OK ) {
+        return ESP_LOADER_ERROR_FAIL;
+    }
+    if ( uart_driver_install(s_uart_port, rx_buffer_size, tx_buffer_size, queue_size, uart_queue, 0) != ESP_OK ) {
+        return ESP_LOADER_ERROR_FAIL;
+    }
+
+    // Initialize boot pin selection pins
+    gpio_reset_pin(s_reset_trigger_pin);
+    gpio_set_pull_mode(s_reset_trigger_pin, GPIO_PULLUP_ONLY);
+    gpio_set_direction(s_reset_trigger_pin, GPIO_MODE_OUTPUT);
+
+    gpio_reset_pin(s_gpio0_trigger_pin);
+    gpio_set_pull_mode(s_gpio0_trigger_pin, GPIO_PULLUP_ONLY);
+    gpio_set_direction(s_gpio0_trigger_pin, GPIO_MODE_OUTPUT);
+
+    return ESP_LOADER_SUCCESS;
+}
+
+void loader_port_esp32_deinit(void)
+{
+    uart_driver_delete(s_uart_port);
+}
+
+
+esp_loader_error_t loader_port_write(const uint8_t *data, uint16_t size, uint32_t timeout)
+{
+    uart_write_bytes(s_uart_port, (const char *)data, size);
+    esp_err_t err = uart_wait_tx_done(s_uart_port, pdMS_TO_TICKS(timeout));
+
+    if (err == ESP_OK) {
+#ifdef SERIAL_FLASHER_DEBUG_TRACE
+        transfer_debug_print(data, size, true);
+#endif
+        return ESP_LOADER_SUCCESS;
+    } else if (err == ESP_ERR_TIMEOUT) {
+        return ESP_LOADER_ERROR_TIMEOUT;
+    } else {
+        return ESP_LOADER_ERROR_FAIL;
+    }
+}
+
+
+esp_loader_error_t loader_port_read(uint8_t *data, uint16_t size, uint32_t timeout)
+{
+    int read = uart_read_bytes(s_uart_port, data, size, pdMS_TO_TICKS(timeout));
+
+    if (read < 0) {
+        return ESP_LOADER_ERROR_FAIL;
+    } else if (read < size) {
+#ifdef SERIAL_FLASHER_DEBUG_TRACE
+        transfer_debug_print(data, read, false);
+#endif
+        return ESP_LOADER_ERROR_TIMEOUT;
+    } else {
+#ifdef SERIAL_FLASHER_DEBUG_TRACE
+        transfer_debug_print(data, read, false);
+#endif
+        return ESP_LOADER_SUCCESS;
+    }
+}
+
+
+// Set GPIO0 LOW, then
+// assert reset pin for 50 milliseconds.
+void loader_port_enter_bootloader(void)
+{
+    gpio_set_level(s_gpio0_trigger_pin, 0);
+    loader_port_reset_target();
+    loader_port_delay_ms(SERIAL_FLASHER_BOOT_HOLD_TIME_MS);
+    gpio_set_level(s_gpio0_trigger_pin, 1);
+}
+
+
+void loader_port_reset_target(void)
+{
+    gpio_set_level(s_reset_trigger_pin, 0);
+    loader_port_delay_ms(SERIAL_FLASHER_RESET_HOLD_TIME_MS);
+    gpio_set_level(s_reset_trigger_pin, 1);
+}
+
+
+void loader_port_delay_ms(uint32_t ms)
+{
+    usleep(ms * 1000);
+}
+
+
+void loader_port_start_timer(uint32_t ms)
+{
+    s_time_end = esp_timer_get_time() + ms * 1000;
+}
+
+
+uint32_t loader_port_remaining_time(void)
+{
+    int64_t remaining = (s_time_end - esp_timer_get_time()) / 1000;
+    return (remaining > 0) ? (uint32_t)remaining : 0;
+}
+
+
+void loader_port_debug_print(const char *str)
+{
+    printf("DEBUG: %s\n", str);
+}
+
+esp_loader_error_t loader_port_change_transmission_rate(uint32_t baudrate)
+{
+    esp_err_t err = uart_set_baudrate(s_uart_port, baudrate);
+    return (err == ESP_OK) ? ESP_LOADER_SUCCESS : ESP_LOADER_ERROR_FAIL;
+}

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/src/esp_loader.c

@@ -0,0 +1,415 @@
+/* Copyright 2020-2023 Espressif Systems (Shanghai) CO LTD
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "protocol.h"
+#include "esp_loader_io.h"
+#include "esp_loader.h"
+#include "esp_targets.h"
+#include "md5_hash.h"
+#include <string.h>
+#include <assert.h>
+
+#ifndef MAX
+#define MAX(a, b) ((a) > (b)) ? (a) : (b)
+#endif
+
+#ifndef MIN
+#define MIN(a, b) ((a) < (b)) ? (a) : (b)
+#endif
+
+#ifndef ROUNDUP
+#define ROUNDUP(a, b) (((int)a + (int)b - 1) / (int)b)
+#endif
+
+static const uint32_t DEFAULT_TIMEOUT = 1000;
+static const uint32_t DEFAULT_FLASH_TIMEOUT = 3000;       // timeout for most flash operations
+static const uint32_t LOAD_RAM_TIMEOUT_PER_MB = 2000000; // timeout (per megabyte) for erasing a region
+
+typedef enum {
+    SPI_FLASH_READ_ID = 0x9F
+} spi_flash_cmd_t;
+
+static const target_registers_t *s_reg = NULL;
+static target_chip_t s_target = ESP_UNKNOWN_CHIP;
+
+#if MD5_ENABLED
+
+static const uint32_t MD5_TIMEOUT_PER_MB = 800;
+static struct MD5Context s_md5_context;
+static uint32_t s_start_address;
+static uint32_t s_image_size;
+
+static inline void init_md5(uint32_t address, uint32_t size)
+{
+    s_start_address = address;
+    s_image_size = size;
+    MD5Init(&s_md5_context);
+}
+
+static inline void md5_update(const uint8_t *data, uint32_t size)
+{
+    MD5Update(&s_md5_context, data, size);
+}
+
+static inline void md5_final(uint8_t digets[16])
+{
+    MD5Final(digets, &s_md5_context);
+}
+
+#else
+
+static inline void init_md5(uint32_t address, uint32_t size) { }
+static inline void md5_update(const uint8_t *data, uint32_t size) { }
+static inline void md5_final(uint8_t digets[16]) { }
+
+#endif
+
+
+static uint32_t timeout_per_mb(uint32_t size_bytes, uint32_t time_per_mb)
+{
+    uint32_t timeout = time_per_mb * (size_bytes / 1e6);
+    return MAX(timeout, DEFAULT_FLASH_TIMEOUT);
+}
+
+esp_loader_error_t esp_loader_connect(esp_loader_connect_args_t *connect_args)
+{
+    loader_port_enter_bootloader();
+
+    RETURN_ON_ERROR(loader_initialize_conn(connect_args));
+
+    RETURN_ON_ERROR(loader_detect_chip(&s_target, &s_reg));
+
+#ifdef SERIAL_FLASHER_INTERFACE_UART
+    esp_loader_error_t err;
+    uint32_t spi_config;
+    if (s_target == ESP8266_CHIP) {
+        err = loader_flash_begin_cmd(0, 0, 0, 0, s_target);
+    } else {
+        RETURN_ON_ERROR( loader_read_spi_config(s_target, &spi_config) );
+        loader_port_start_timer(DEFAULT_TIMEOUT);
+        err = loader_spi_attach_cmd(spi_config);
+    }
+    return err;
+#endif /* SERIAL_FLASHER_INTERFACE_UART */
+    return ESP_LOADER_SUCCESS;
+}
+
+target_chip_t esp_loader_get_target(void)
+{
+    return s_target;
+}
+
+#ifdef SERIAL_FLASHER_INTERFACE_UART
+static uint32_t s_flash_write_size = 0;
+
+static esp_loader_error_t spi_set_data_lengths(size_t mosi_bits, size_t miso_bits)
+{
+    if (mosi_bits > 0) {
+        RETURN_ON_ERROR( esp_loader_write_register(s_reg->mosi_dlen, mosi_bits - 1) );
+    }
+    if (miso_bits > 0) {
+        RETURN_ON_ERROR( esp_loader_write_register(s_reg->miso_dlen, miso_bits - 1) );
+    }
+
+    return ESP_LOADER_SUCCESS;
+}
+
+static esp_loader_error_t spi_set_data_lengths_8266(size_t mosi_bits, size_t miso_bits)
+{
+    uint32_t mosi_mask = (mosi_bits == 0) ? 0 : mosi_bits - 1;
+    uint32_t miso_mask = (miso_bits == 0) ? 0 : miso_bits - 1;
+    return esp_loader_write_register(s_reg->usr1, (miso_mask << 8) | (mosi_mask << 17));
+}
+
+static esp_loader_error_t spi_flash_command(spi_flash_cmd_t cmd, void *data_tx, size_t tx_size, void *data_rx, size_t rx_size)
+{
+    assert(rx_size <= 32); // Reading more than 32 bits back from a SPI flash operation is unsupported
+    assert(tx_size <= 64); // Writing more than 64 bytes of data with one SPI command is unsupported
+
+    uint32_t SPI_USR_CMD  = (1 << 31);
+    uint32_t SPI_USR_MISO = (1 << 28);
+    uint32_t SPI_USR_MOSI = (1 << 27);
+    uint32_t SPI_CMD_USR  = (1 << 18);
+    uint32_t CMD_LEN_SHIFT = 28;
+
+    // Save SPI configuration
+    uint32_t old_spi_usr;
+    uint32_t old_spi_usr2;
+    RETURN_ON_ERROR( esp_loader_read_register(s_reg->usr, &old_spi_usr) );
+    RETURN_ON_ERROR( esp_loader_read_register(s_reg->usr2, &old_spi_usr2) );
+
+    if (s_target == ESP8266_CHIP) {
+        RETURN_ON_ERROR( spi_set_data_lengths_8266(tx_size, rx_size) );
+    } else {
+        RETURN_ON_ERROR( spi_set_data_lengths(tx_size, rx_size) );
+    }
+
+    uint32_t usr_reg_2 = (7 << CMD_LEN_SHIFT) | cmd;
+    uint32_t usr_reg = SPI_USR_CMD;
+    if (rx_size > 0) {
+        usr_reg |= SPI_USR_MISO;
+    }
+    if (tx_size > 0) {
+        usr_reg |= SPI_USR_MOSI;
+    }
+
+    RETURN_ON_ERROR( esp_loader_write_register(s_reg->usr, usr_reg) );
+    RETURN_ON_ERROR( esp_loader_write_register(s_reg->usr2, usr_reg_2 ) );
+
+    if (tx_size == 0) {
+        // clear data register before we read it
+        RETURN_ON_ERROR( esp_loader_write_register(s_reg->w0, 0) );
+    } else {
+        uint32_t *data = (uint32_t *)data_tx;
+        uint32_t words_to_write = (tx_size + 31) / (8 * 4);
+        uint32_t data_reg_addr = s_reg->w0;
+
+        while (words_to_write--) {
+            uint32_t word = *data++;
+            RETURN_ON_ERROR( esp_loader_write_register(data_reg_addr, word) );
+            data_reg_addr += 4;
+        }
+    }
+
+    RETURN_ON_ERROR( esp_loader_write_register(s_reg->cmd, SPI_CMD_USR) );
+
+    uint32_t trials = 10;
+    while (trials--) {
+        uint32_t cmd_reg;
+        RETURN_ON_ERROR( esp_loader_read_register(s_reg->cmd, &cmd_reg) );
+        if ((cmd_reg & SPI_CMD_USR) == 0) {
+            break;
+        }
+    }
+
+    if (trials == 0) {
+        return ESP_LOADER_ERROR_TIMEOUT;
+    }
+
+    RETURN_ON_ERROR( esp_loader_read_register(s_reg->w0, data_rx) );
+
+    // Restore SPI configuration
+    RETURN_ON_ERROR( esp_loader_write_register(s_reg->usr, old_spi_usr) );
+    RETURN_ON_ERROR( esp_loader_write_register(s_reg->usr2, old_spi_usr2) );
+
+    return ESP_LOADER_SUCCESS;
+}
+
+static esp_loader_error_t detect_flash_size(size_t *flash_size)
+{
+    uint32_t flash_id = 0;
+
+    RETURN_ON_ERROR( spi_flash_command(SPI_FLASH_READ_ID, NULL, 0, &flash_id, 24) );
+    uint32_t size_id = flash_id >> 16;
+
+    if (size_id < 0x12 || size_id > 0x18) {
+        return ESP_LOADER_ERROR_UNSUPPORTED_CHIP;
+    }
+
+    *flash_size = 1 << size_id;
+
+    return ESP_LOADER_SUCCESS;
+}
+
+static uint32_t calc_erase_size(const target_chip_t target, const uint32_t offset,
+                                const uint32_t image_size)
+{
+    if (target != ESP8266_CHIP) {
+        return image_size;
+    } else {
+        /* Needed to fix a bug in the ESP8266 ROM */
+        const uint32_t sectors_per_block = 16U;
+        const uint32_t sector_size = 4096U;
+
+        const uint32_t num_sectors = (image_size + sector_size - 1) / sector_size;
+        const uint32_t start_sector = offset / sector_size;
+
+        uint32_t head_sectors = sectors_per_block - (start_sector % sectors_per_block);
+
+        /* The ROM bug deletes extra num_sectors if we don't cross the block boundary
+           and extra head_sectors if we do */
+        if (num_sectors <= head_sectors) {
+            return ((num_sectors + 1) / 2) * sector_size;
+        } else {
+            return (num_sectors - head_sectors) * sector_size;
+        }
+    }
+}
+
+esp_loader_error_t esp_loader_flash_start(uint32_t offset, uint32_t image_size, uint32_t block_size)
+{
+    s_flash_write_size = block_size;
+
+    size_t flash_size = 0;
+    if (detect_flash_size(&flash_size) == ESP_LOADER_SUCCESS) {
+        if (image_size > flash_size) {
+            return ESP_LOADER_ERROR_IMAGE_SIZE;
+        }
+        loader_port_start_timer(DEFAULT_TIMEOUT);
+        RETURN_ON_ERROR( loader_spi_parameters(flash_size) );
+    } else {
+        loader_port_debug_print("Flash size detection failed, falling back to default");
+    }
+
+    init_md5(offset, image_size);
+
+    bool encryption_in_cmd = encryption_in_begin_flash_cmd(s_target);
+    const uint32_t erase_size = calc_erase_size(esp_loader_get_target(), offset, image_size);
+    const uint32_t blocks_to_write = (image_size + block_size - 1) / block_size;
+
+    const uint32_t erase_region_timeout_per_mb = 10000;
+    loader_port_start_timer(timeout_per_mb(erase_size, erase_region_timeout_per_mb));
+    return loader_flash_begin_cmd(offset, erase_size, block_size, blocks_to_write, encryption_in_cmd);
+}
+
+
+esp_loader_error_t esp_loader_flash_write(void *payload, uint32_t size)
+{
+    uint32_t padding_bytes = s_flash_write_size - size;
+    uint8_t *data = (uint8_t *)payload;
+    uint32_t padding_index = size;
+
+    if (size > s_flash_write_size) {
+        return ESP_LOADER_ERROR_INVALID_PARAM;
+    }
+
+    const uint8_t padding_pattern = 0xFF;
+    while (padding_bytes--) {
+        data[padding_index++] = padding_pattern;
+    }
+
+    md5_update(payload, (size + 3) & ~3);
+
+    loader_port_start_timer(DEFAULT_TIMEOUT);
+
+    return loader_flash_data_cmd(data, s_flash_write_size);
+}
+
+
+esp_loader_error_t esp_loader_flash_finish(bool reboot)
+{
+    loader_port_start_timer(DEFAULT_TIMEOUT);
+
+    return loader_flash_end_cmd(!reboot);
+}
+#endif /* SERIAL_FLASHER_INTERFACE_UART */
+
+esp_loader_error_t esp_loader_mem_start(uint32_t offset, uint32_t size, uint32_t block_size)
+{
+    uint32_t blocks_to_write = ROUNDUP(size, block_size);
+    loader_port_start_timer(timeout_per_mb(size, LOAD_RAM_TIMEOUT_PER_MB));
+    return loader_mem_begin_cmd(offset, size, blocks_to_write, block_size);
+}
+
+
+esp_loader_error_t esp_loader_mem_write(const void *payload, uint32_t size)
+{
+    const uint8_t *data = (const uint8_t *)payload;
+    loader_port_start_timer(timeout_per_mb(size, LOAD_RAM_TIMEOUT_PER_MB));
+    return loader_mem_data_cmd(data, size);
+}
+
+
+esp_loader_error_t esp_loader_mem_finish(uint32_t entrypoint)
+{
+    loader_port_start_timer(DEFAULT_TIMEOUT);
+    return loader_mem_end_cmd(entrypoint);
+}
+
+
+esp_loader_error_t esp_loader_read_register(uint32_t address, uint32_t *reg_value)
+{
+    loader_port_start_timer(DEFAULT_TIMEOUT);
+
+    return loader_read_reg_cmd(address, reg_value);
+}
+
+
+esp_loader_error_t esp_loader_write_register(uint32_t address, uint32_t reg_value)
+{
+    loader_port_start_timer(DEFAULT_TIMEOUT);
+
+    return loader_write_reg_cmd(address, reg_value, 0xFFFFFFFF, 0);
+}
+
+esp_loader_error_t esp_loader_change_transmission_rate(uint32_t transmission_rate)
+{
+    if (s_target == ESP8266_CHIP) {
+        return ESP_LOADER_ERROR_UNSUPPORTED_FUNC;
+    }
+
+    loader_port_start_timer(DEFAULT_TIMEOUT);
+
+    return loader_change_baudrate_cmd(transmission_rate);
+}
+
+#if MD5_ENABLED
+
+static void hexify(const uint8_t raw_md5[16], uint8_t hex_md5_out[32])
+{
+    static const uint8_t dec_to_hex[] = {
+        '0', '1', '2', '3', '4', '5', '6', '7',
+        '8', '9', 'a', 'b', 'c', 'd', 'e', 'f'
+    };
+    for (int i = 0; i < 16; i++) {
+        *hex_md5_out++ = dec_to_hex[raw_md5[i] >> 4];
+        *hex_md5_out++ = dec_to_hex[raw_md5[i] & 0xF];
+    }
+}
+
+
+esp_loader_error_t esp_loader_flash_verify(void)
+{
+    if (s_target == ESP8266_CHIP) {
+        return ESP_LOADER_ERROR_UNSUPPORTED_FUNC;
+    }
+
+    uint8_t raw_md5[16] = {0};
+
+    /* Zero termination and new line character require 2 bytes */
+    uint8_t hex_md5[MD5_SIZE + 2] = {0};
+    uint8_t received_md5[MD5_SIZE + 2] = {0};
+
+    md5_final(raw_md5);
+    hexify(raw_md5, hex_md5);
+
+    loader_port_start_timer(timeout_per_mb(s_image_size, MD5_TIMEOUT_PER_MB));
+
+    RETURN_ON_ERROR( loader_md5_cmd(s_start_address, s_image_size, received_md5) );
+
+    bool md5_match = memcmp(hex_md5, received_md5, MD5_SIZE) == 0;
+
+    if (!md5_match) {
+        hex_md5[MD5_SIZE] = '\n';
+        received_md5[MD5_SIZE] = '\n';
+
+        loader_port_debug_print("Error: MD5 checksum does not match:\n");
+        loader_port_debug_print("Expected:\n");
+        loader_port_debug_print((char *)received_md5);
+        loader_port_debug_print("Actual:\n");
+        loader_port_debug_print((char *)hex_md5);
+
+        return ESP_LOADER_ERROR_INVALID_MD5;
+    }
+
+    return ESP_LOADER_SUCCESS;
+}
+
+#endif
+
+void esp_loader_reset_target(void)
+{
+    loader_port_reset_target();
+}

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/src/esp_targets.c

@@ -0,0 +1,288 @@
+/* Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "esp_targets.h"
+#include <stddef.h>
+
+#define MAX_MAGIC_VALUES 2
+
+typedef esp_loader_error_t (*read_spi_config_t)(uint32_t efuse_base, uint32_t *spi_config);
+
+typedef struct {
+    target_registers_t regs;
+    uint32_t efuse_base;
+    uint32_t chip_magic_value[MAX_MAGIC_VALUES];
+    read_spi_config_t read_spi_config;
+    bool encryption_in_begin_flash_cmd;
+} esp_target_t;
+
+// This ROM address has a different value on each chip model
+#define CHIP_DETECT_MAGIC_REG_ADDR 0x40001000
+
+#define ESP8266_SPI_REG_BASE 0x60000200
+#define ESP32S2_SPI_REG_BASE 0x3f402000
+#define ESP32C6_SPI_REG_BASE 0x60003000
+#define ESP32xx_SPI_REG_BASE 0x60002000
+#define ESP32_SPI_REG_BASE   0x3ff42000
+
+static esp_loader_error_t spi_config_esp32(uint32_t efuse_base, uint32_t *spi_config);
+static esp_loader_error_t spi_config_esp32xx(uint32_t efuse_base, uint32_t *spi_config);
+
+static const esp_target_t esp_target[ESP_MAX_CHIP] = {
+
+    // ESP8266
+    {
+        .regs = {
+            .cmd  = ESP8266_SPI_REG_BASE + 0x00,
+            .usr  = ESP8266_SPI_REG_BASE + 0x1c,
+            .usr1 = ESP8266_SPI_REG_BASE + 0x20,
+            .usr2 = ESP8266_SPI_REG_BASE + 0x24,
+            .w0   = ESP8266_SPI_REG_BASE + 0x40,
+            .mosi_dlen  = 0,
+            .miso_dlen  = 0,
+        },
+        .efuse_base = 0,            // Not used
+        .chip_magic_value  = { 0xfff0c101, 0 },
+        .read_spi_config = NULL,    // Not used
+        .encryption_in_begin_flash_cmd = false,
+    },
+
+    // ESP32
+    {
+        .regs = {
+            .cmd  = ESP32_SPI_REG_BASE + 0x00,
+            .usr  = ESP32_SPI_REG_BASE + 0x1c,
+            .usr1 = ESP32_SPI_REG_BASE + 0x20,
+            .usr2 = ESP32_SPI_REG_BASE + 0x24,
+            .w0   = ESP32_SPI_REG_BASE + 0x80,
+            .mosi_dlen = ESP32_SPI_REG_BASE + 0x28,
+            .miso_dlen = ESP32_SPI_REG_BASE + 0x2c,
+        },
+        .efuse_base = 0x3ff5A000,
+        .chip_magic_value  = { 0x00f01d83, 0 },
+        .read_spi_config = spi_config_esp32,
+        .encryption_in_begin_flash_cmd = false,
+    },
+
+    // ESP32S2
+    {
+        .regs = {
+            .cmd  = ESP32S2_SPI_REG_BASE + 0x00,
+            .usr  = ESP32S2_SPI_REG_BASE + 0x18,
+            .usr1 = ESP32S2_SPI_REG_BASE + 0x1c,
+            .usr2 = ESP32S2_SPI_REG_BASE + 0x20,
+            .w0   = ESP32S2_SPI_REG_BASE + 0x58,
+            .mosi_dlen = ESP32S2_SPI_REG_BASE + 0x24,
+            .miso_dlen = ESP32S2_SPI_REG_BASE + 0x28,
+        },
+        .efuse_base = 0x3f41A000,
+        .chip_magic_value  = { 0x000007c6, 0 },
+        .read_spi_config = spi_config_esp32xx,
+        .encryption_in_begin_flash_cmd = true,
+    },
+
+    // ESP32C3
+    {
+        .regs = {
+            .cmd  = ESP32xx_SPI_REG_BASE + 0x00,
+            .usr  = ESP32xx_SPI_REG_BASE + 0x18,
+            .usr1 = ESP32xx_SPI_REG_BASE + 0x1c,
+            .usr2 = ESP32xx_SPI_REG_BASE + 0x20,
+            .w0   = ESP32xx_SPI_REG_BASE + 0x58,
+            .mosi_dlen = ESP32xx_SPI_REG_BASE + 0x24,
+            .miso_dlen = ESP32xx_SPI_REG_BASE + 0x28,
+        },
+        .efuse_base = 0x60008800,
+        .chip_magic_value = { 0x6921506f, 0x1b31506f },
+        .read_spi_config = spi_config_esp32xx,
+        .encryption_in_begin_flash_cmd = true,
+    },
+
+    // ESP32S3
+    {
+        .regs = {
+            .cmd  = ESP32xx_SPI_REG_BASE + 0x00,
+            .usr  = ESP32xx_SPI_REG_BASE + 0x18,
+            .usr1 = ESP32xx_SPI_REG_BASE + 0x1c,
+            .usr2 = ESP32xx_SPI_REG_BASE + 0x20,
+            .w0   = ESP32xx_SPI_REG_BASE + 0x58,
+            .mosi_dlen = ESP32xx_SPI_REG_BASE + 0x24,
+            .miso_dlen = ESP32xx_SPI_REG_BASE + 0x28,
+        },
+        .efuse_base = 0x60007000,
+        .chip_magic_value = { 0x00000009, 0 },
+        .read_spi_config = spi_config_esp32xx,
+        .encryption_in_begin_flash_cmd = true,
+    },
+
+    // ESP32C2
+    {
+        .regs = {
+            .cmd  = ESP32xx_SPI_REG_BASE + 0x00,
+            .usr  = ESP32xx_SPI_REG_BASE + 0x18,
+            .usr1 = ESP32xx_SPI_REG_BASE + 0x1c,
+            .usr2 = ESP32xx_SPI_REG_BASE + 0x20,
+            .w0   = ESP32xx_SPI_REG_BASE + 0x58,
+            .mosi_dlen = ESP32xx_SPI_REG_BASE + 0x24,
+            .miso_dlen = ESP32xx_SPI_REG_BASE + 0x28,
+        },
+        .efuse_base = 0x60008800,
+        .chip_magic_value = { 0x6f51306f, 0x7c41a06f },
+        .read_spi_config = spi_config_esp32xx,
+        .encryption_in_begin_flash_cmd = true,
+    },
+    // ESP32H4
+    {
+        .regs = {
+            .cmd  = ESP32xx_SPI_REG_BASE + 0x00,
+            .usr  = ESP32xx_SPI_REG_BASE + 0x18,
+            .usr1 = ESP32xx_SPI_REG_BASE + 0x1c,
+            .usr2 = ESP32xx_SPI_REG_BASE + 0x20,
+            .w0   = ESP32xx_SPI_REG_BASE + 0x58,
+            .mosi_dlen = ESP32xx_SPI_REG_BASE + 0x24,
+            .miso_dlen = ESP32xx_SPI_REG_BASE + 0x28,
+        },
+        .efuse_base = 0x6001A000,
+        .chip_magic_value = {0xca26cc22, 0x6881b06f}, // ESP32H4-BETA1, ESP32H4-BETA2
+        .read_spi_config = spi_config_esp32xx,
+        .encryption_in_begin_flash_cmd = true,
+    },
+    // ESP32H2
+    {
+        .regs = {
+            .cmd  = ESP32xx_SPI_REG_BASE + 0x00,
+            .usr  = ESP32xx_SPI_REG_BASE + 0x18,
+            .usr1 = ESP32xx_SPI_REG_BASE + 0x1c,
+            .usr2 = ESP32xx_SPI_REG_BASE + 0x20,
+            .w0   = ESP32xx_SPI_REG_BASE + 0x58,
+            .mosi_dlen = ESP32xx_SPI_REG_BASE + 0x24,
+            .miso_dlen = ESP32xx_SPI_REG_BASE + 0x28,
+        },
+        .efuse_base = 0x6001A000,
+        .chip_magic_value = {0xd7b73e80, 0},
+        .read_spi_config = spi_config_esp32xx,
+        .encryption_in_begin_flash_cmd = true,
+    },
+    // ESP32C6
+    {
+        .regs = {
+            .cmd  = ESP32C6_SPI_REG_BASE + 0x00,
+            .usr  = ESP32C6_SPI_REG_BASE + 0x18,
+            .usr1 = ESP32C6_SPI_REG_BASE + 0x1c,
+            .usr2 = ESP32C6_SPI_REG_BASE + 0x20,
+            .w0   = ESP32C6_SPI_REG_BASE + 0x58,
+            .mosi_dlen = ESP32C6_SPI_REG_BASE + 0x24,
+            .miso_dlen = ESP32C6_SPI_REG_BASE + 0x28,
+        },
+        .efuse_base = 0x600B0800,
+        .chip_magic_value = { 0x2CE0806F, 0 },
+        .read_spi_config = spi_config_esp32xx,
+        .encryption_in_begin_flash_cmd = true,
+    },
+};
+
+const target_registers_t *get_esp_target_data(target_chip_t chip)
+{
+    return (const target_registers_t *)&esp_target[chip];
+}
+
+esp_loader_error_t loader_detect_chip(target_chip_t *target_chip, const target_registers_t **target_data)
+{
+    uint32_t magic_value;
+    RETURN_ON_ERROR( esp_loader_read_register(CHIP_DETECT_MAGIC_REG_ADDR,  &magic_value) );
+
+    for (int chip = 0; chip < ESP_MAX_CHIP; chip++) {
+        for(int index = 0; index < MAX_MAGIC_VALUES; index++) {
+            if (magic_value == esp_target[chip].chip_magic_value[index]) {
+                *target_chip = (target_chip_t)chip;
+                *target_data = (target_registers_t *)&esp_target[chip];
+                return ESP_LOADER_SUCCESS;
+            }
+        }
+    }
+
+    return ESP_LOADER_ERROR_INVALID_TARGET;
+}
+
+esp_loader_error_t loader_read_spi_config(target_chip_t target_chip, uint32_t *spi_config)
+{
+    const esp_target_t *target = &esp_target[target_chip];
+    return target->read_spi_config(target->efuse_base, spi_config);
+}
+
+static inline uint32_t efuse_word_addr(uint32_t efuse_base, uint32_t n)
+{
+    return efuse_base + (n * 4);
+}
+
+// 30->GPIO32 | 31->GPIO33
+static inline uint8_t adjust_pin_number(uint8_t num)
+{
+    return (num >= 30) ? num + 2 : num;
+}
+
+
+static esp_loader_error_t spi_config_esp32(uint32_t efuse_base, uint32_t *spi_config)
+{
+    *spi_config = 0;
+
+    uint32_t reg5, reg3;
+    RETURN_ON_ERROR( esp_loader_read_register(efuse_word_addr(efuse_base, 5), &reg5) );
+    RETURN_ON_ERROR( esp_loader_read_register(efuse_word_addr(efuse_base, 3), &reg3) );
+
+    uint32_t pins = reg5 & 0xfffff;
+
+    if (pins == 0 || pins == 0xfffff) {
+        return ESP_LOADER_SUCCESS;
+    }
+
+    uint8_t clk = adjust_pin_number( (pins >> 0)  & 0x1f );
+    uint8_t q   = adjust_pin_number( (pins >> 5)  & 0x1f );
+    uint8_t d   = adjust_pin_number( (pins >> 10) & 0x1f );
+    uint8_t cs  = adjust_pin_number( (pins >> 15) & 0x1f );
+    uint8_t hd  = adjust_pin_number( (reg3 >> 4)  & 0x1f );
+
+    if (clk == cs || clk == d || clk == q || q == cs || q == d || q == d) {
+        return ESP_LOADER_SUCCESS;
+    }
+
+    *spi_config = (hd << 24) | (cs << 18) | (d << 12) | (q << 6) | clk;
+
+    return ESP_LOADER_SUCCESS;
+}
+
+// Applies for esp32s2, esp32c3 and esp32c3
+static esp_loader_error_t spi_config_esp32xx(uint32_t efuse_base, uint32_t *spi_config)
+{
+    *spi_config = 0;
+
+    uint32_t reg1, reg2;
+    RETURN_ON_ERROR( esp_loader_read_register(efuse_word_addr(efuse_base, 18), &reg1) );
+    RETURN_ON_ERROR( esp_loader_read_register(efuse_word_addr(efuse_base, 19), &reg2) );
+
+    uint32_t pins = ((reg1 >> 16) | ((reg2 & 0xfffff) << 16)) & 0x3fffffff;
+
+    if (pins == 0 || pins == 0xffffffff) {
+        return ESP_LOADER_SUCCESS;
+    }
+
+    *spi_config = pins;
+    return ESP_LOADER_SUCCESS;
+}
+
+bool encryption_in_begin_flash_cmd(const target_chip_t target)
+{
+    return esp_target[target].encryption_in_begin_flash_cmd;
+}

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/src/example_common.c

@@ -0,0 +1,347 @@
+/* Copyright 2020-2023 Espressif Systems (Shanghai) CO LTD
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <inttypes.h>
+#include <sys/param.h>
+#include "esp_loader_io.h"
+#include "esp_loader.h"
+#include "example_common.h"
+
+#ifndef SINGLE_TARGET_SUPPORT
+
+
+// For esp8266, esp32, esp32s2
+#define BOOTLOADER_ADDRESS_V0       0x1000
+// For esp32s3 and later chips
+#define BOOTLOADER_ADDRESS_V1       0x0
+#define PARTITION_ADDRESS           0x8000
+#define APPLICATION_ADDRESS         0x10000
+
+extern const uint8_t  ESP32_bootloader_bin[];
+extern const uint32_t ESP32_bootloader_bin_size;
+extern const uint8_t  ESP32_hello_world_bin[];
+extern const uint32_t ESP32_hello_world_bin_size;
+extern const uint8_t  ESP32_partition_table_bin[];
+extern const uint32_t ESP32_partition_table_bin_size;
+
+extern const uint8_t  ESP32_S2_bootloader_bin[];
+extern const uint32_t ESP32_S2_bootloader_bin_size;
+extern const uint8_t  ESP32_S2_hello_world_bin[];
+extern const uint32_t ESP32_S2_hello_world_bin_size;
+extern const uint8_t  ESP32_S2_partition_table_bin[];
+extern const uint32_t ESP32_S2_partition_table_bin_size;
+
+extern const uint8_t  ESP8266_bootloader_bin[];
+extern const uint32_t ESP8266_bootloader_bin_size;
+extern const uint8_t  ESP8266_hello_world_bin[];
+extern const uint32_t ESP8266_hello_world_bin_size;
+extern const uint8_t  ESP8266_partition_table_bin[];
+extern const uint32_t ESP8266_partition_table_bin_size;
+
+extern const uint8_t  ESP32_H4_bootloader_bin[];
+extern const uint32_t ESP32_H4_bootloader_bin_size;
+extern const uint8_t  ESP32_H4_hello_world_bin[];
+extern const uint32_t ESP32_H4_hello_world_bin_size;
+extern const uint8_t  ESP32_H4_partition_table_bin[];
+extern const uint32_t ESP32_H4_partition_table_bin_size;
+
+extern const uint8_t  ESP32_H2_bootloader_bin[];
+extern const uint32_t ESP32_H2_bootloader_bin_size;
+extern const uint8_t  ESP32_H2_hello_world_bin[];
+extern const uint32_t ESP32_H2_hello_world_bin_size;
+extern const uint8_t  ESP32_H2_partition_table_bin[];
+extern const uint32_t ESP32_H2_partition_table_bin_size;
+
+extern const uint8_t  ESP32_C6_bootloader_bin[];
+extern const uint32_t ESP32_C6_bootloader_bin_size;
+extern const uint8_t  ESP32_C6_hello_world_bin[];
+extern const uint32_t ESP32_C6_hello_world_bin_size;
+extern const uint8_t  ESP32_C6_partition_table_bin[];
+extern const uint32_t ESP32_C6_partition_table_bin_size;
+
+void get_example_binaries(target_chip_t target, example_binaries_t *bins)
+{
+    if (target == ESP8266_CHIP) {
+        bins->boot.data = ESP8266_bootloader_bin;
+        bins->boot.size = ESP8266_bootloader_bin_size;
+        bins->boot.addr = BOOTLOADER_ADDRESS_V0;
+        bins->part.data = ESP8266_partition_table_bin;
+        bins->part.size = ESP8266_partition_table_bin_size;
+        bins->part.addr = PARTITION_ADDRESS;
+        bins->app.data  = ESP8266_hello_world_bin;
+        bins->app.size  = ESP8266_hello_world_bin_size;
+        bins->app.addr  = APPLICATION_ADDRESS;
+    } else if (target == ESP32_CHIP) {
+        bins->boot.data = ESP32_bootloader_bin;
+        bins->boot.size = ESP32_bootloader_bin_size;
+        bins->boot.addr = BOOTLOADER_ADDRESS_V0;
+        bins->part.data = ESP32_partition_table_bin;
+        bins->part.size = ESP32_partition_table_bin_size;
+        bins->part.addr = PARTITION_ADDRESS;
+        bins->app.data  = ESP32_hello_world_bin;
+        bins->app.size  = ESP32_hello_world_bin_size;
+        bins->app.addr  = APPLICATION_ADDRESS;
+    } else if (target == ESP32S2_CHIP) {
+        bins->boot.data = ESP32_S2_bootloader_bin;
+        bins->boot.size = ESP32_S2_bootloader_bin_size;
+        bins->boot.addr = BOOTLOADER_ADDRESS_V0;
+        bins->part.data = ESP32_S2_partition_table_bin;
+        bins->part.size = ESP32_S2_partition_table_bin_size;
+        bins->part.addr = PARTITION_ADDRESS;
+        bins->app.data  = ESP32_S2_hello_world_bin;
+        bins->app.size  = ESP32_S2_hello_world_bin_size;
+        bins->app.addr  = APPLICATION_ADDRESS;
+    } else if (target == ESP32H4_CHIP){
+        bins->boot.data = ESP32_H4_bootloader_bin;
+        bins->boot.size = ESP32_H4_bootloader_bin_size;
+        bins->boot.addr = BOOTLOADER_ADDRESS_V1;
+        bins->part.data = ESP32_H4_partition_table_bin;
+        bins->part.size = ESP32_H4_partition_table_bin_size;
+        bins->part.addr = PARTITION_ADDRESS;
+        bins->app.data  = ESP32_H4_hello_world_bin;
+        bins->app.size  = ESP32_H4_hello_world_bin_size;
+        bins->app.addr  = APPLICATION_ADDRESS;
+    } else if (target == ESP32H2_CHIP){
+        bins->boot.data = ESP32_H2_bootloader_bin;
+        bins->boot.size = ESP32_H2_bootloader_bin_size;
+        bins->boot.addr = BOOTLOADER_ADDRESS_V1;
+        bins->part.data = ESP32_H2_partition_table_bin;
+        bins->part.size = ESP32_H2_partition_table_bin_size;
+        bins->part.addr = PARTITION_ADDRESS;
+        bins->app.data  = ESP32_H2_hello_world_bin;
+        bins->app.size  = ESP32_H2_hello_world_bin_size;
+        bins->app.addr  = APPLICATION_ADDRESS;
+    } else if (target == ESP32C6_CHIP){
+        bins->boot.data = ESP32_C6_bootloader_bin;
+        bins->boot.size = ESP32_C6_bootloader_bin_size;
+        bins->boot.addr = BOOTLOADER_ADDRESS_V1;
+        bins->part.data = ESP32_C6_partition_table_bin;
+        bins->part.size = ESP32_C6_partition_table_bin_size;
+        bins->part.addr = PARTITION_ADDRESS;
+        bins->app.data  = ESP32_C6_hello_world_bin;
+        bins->app.size  = ESP32_C6_hello_world_bin_size;
+        bins->app.addr  = APPLICATION_ADDRESS;
+    } else {
+        abort();
+    }
+}
+
+
+extern const uint8_t  ESP32_app_bin[];
+extern const uint32_t ESP32_app_bin_size;
+extern const uint8_t  ESP32_C2_app_bin[];
+extern const uint32_t ESP32_C2_app_bin_size;
+extern const uint8_t  ESP32_C3_app_bin[];
+extern const uint32_t ESP32_C3_app_bin_size;
+extern const uint8_t  ESP32_H2_app_bin[];
+extern const uint32_t ESP32_H2_app_bin_size;
+extern const uint8_t  ESP32_H4_app_bin[];
+extern const uint32_t ESP32_H4_app_bin_size;
+extern const uint8_t  ESP32_S3_app_bin[];
+extern const uint32_t ESP32_S3_app_bin_size;
+extern const uint8_t  ESP32_C6_app_bin[];
+extern const uint32_t ESP32_C6_app_bin_size;
+
+void get_example_ram_app_binary(target_chip_t target, example_ram_app_binary_t *bin)
+{
+    switch (target) {
+        case ESP32_CHIP: {
+            bin->ram_app.data = ESP32_app_bin;
+            bin->ram_app.size = ESP32_app_bin_size;
+            break;
+        }
+        case ESP32C2_CHIP: {
+            bin->ram_app.data = ESP32_C2_app_bin;
+            bin->ram_app.size = ESP32_C2_app_bin_size;
+            break;
+        }
+        case ESP32C3_CHIP: {
+            bin->ram_app.data = ESP32_C3_app_bin;
+            bin->ram_app.size = ESP32_C3_app_bin_size;
+            break;
+        }
+        case ESP32H2_CHIP: {
+            bin->ram_app.data = ESP32_H2_app_bin;
+            bin->ram_app.size = ESP32_H2_app_bin_size;
+            break;
+        }
+        case ESP32H4_CHIP: {
+            bin->ram_app.data = ESP32_H4_app_bin;
+            bin->ram_app.size = ESP32_H4_app_bin_size;
+            break;
+        }
+        case ESP32S3_CHIP: {
+            bin->ram_app.data = ESP32_S3_app_bin;
+            bin->ram_app.size = ESP32_S3_app_bin_size;
+            break;
+        }
+        case ESP32C6_CHIP: {
+            bin->ram_app.data = ESP32_C6_app_bin;
+            bin->ram_app.size = ESP32_C6_app_bin_size;
+            break;
+        }
+        default: {
+            abort();
+        }
+    }
+}
+
+#endif
+
+esp_loader_error_t connect_to_target(uint32_t higher_transmission_rate)
+{
+    esp_loader_connect_args_t connect_config = ESP_LOADER_CONNECT_DEFAULT();
+
+    esp_loader_error_t err = esp_loader_connect(&connect_config);
+    if (err != ESP_LOADER_SUCCESS) {
+        printf("Cannot connect to target. Error: %u\n", err);
+        return err;
+    }
+    printf("Connected to target\n");
+
+#ifdef SERIAL_FLASHER_INTERFACE_UART
+    if (higher_transmission_rate && esp_loader_get_target() != ESP8266_CHIP) {
+        err = esp_loader_change_transmission_rate(higher_transmission_rate);
+        if (err == ESP_LOADER_ERROR_UNSUPPORTED_FUNC) {
+            printf("ESP8266 does not support change transmission rate command.");
+            return err;
+        } else if (err != ESP_LOADER_SUCCESS) {
+            printf("Unable to change transmission rate on target.");
+            return err;
+        } else {
+            err = loader_port_change_transmission_rate(higher_transmission_rate);
+            if (err != ESP_LOADER_SUCCESS) {
+                printf("Unable to change transmission rate.");
+                return err;
+            }
+            printf("Transmission rate changed changed\n");
+        }
+    }
+#endif /* SERIAL_FLASHER_INTERFACE_UART */
+
+    return ESP_LOADER_SUCCESS;
+}
+
+#ifdef SERIAL_FLASHER_INTERFACE_UART
+esp_loader_error_t flash_binary(const uint8_t *bin, size_t size, size_t address)
+{
+    esp_loader_error_t err;
+    static uint8_t payload[1024];
+    const uint8_t *bin_addr = bin;
+
+    printf("Erasing flash (this may take a while)...\n");
+    err = esp_loader_flash_start(address, size, sizeof(payload));
+    if (err != ESP_LOADER_SUCCESS) {
+        printf("Erasing flash failed with error %d.\n", err);
+        return err;
+    }
+    printf("Start programming\n");
+
+    size_t binary_size = size;
+    size_t written = 0;
+
+    while (size > 0) {
+        size_t to_read = MIN(size, sizeof(payload));
+        memcpy(payload, bin_addr, to_read);
+
+        err = esp_loader_flash_write(payload, to_read);
+        if (err != ESP_LOADER_SUCCESS) {
+            printf("\nPacket could not be written! Error %d.\n", err);
+            return err;
+        }
+
+        size -= to_read;
+        bin_addr += to_read;
+        written += to_read;
+
+        int progress = (int)(((float)written / binary_size) * 100);
+        printf("\rProgress: %d %%", progress);
+        fflush(stdout);
+    };
+
+    printf("\nFinished programming\n");
+
+#if MD5_ENABLED
+    err = esp_loader_flash_verify();
+    if (err == ESP_LOADER_ERROR_UNSUPPORTED_FUNC) {
+        printf("ESP8266 does not support flash verify command.");
+        return err;
+    } else if (err != ESP_LOADER_SUCCESS) {
+        printf("MD5 does not match. err: %d\n", err);
+        return err;
+    }
+    printf("Flash verified\n");
+#endif
+
+    return ESP_LOADER_SUCCESS;
+}
+#endif /* SERIAL_FLASHER_INTERFACE_UART */
+
+esp_loader_error_t load_ram_binary(const uint8_t *bin)
+{
+    printf("Start loading\n");
+    esp_loader_error_t err;
+    const esp_loader_bin_header_t *header = (const esp_loader_bin_header_t *)bin;
+    esp_loader_bin_segment_t segments[header->segments];
+
+    // Parse segments
+    uint32_t seg;
+    uint32_t *cur_seg_pos;
+    for (seg=0, cur_seg_pos = (uint32_t *)(&bin[BIN_FIRST_SEGMENT_OFFSET]);
+         seg < header->segments;
+         seg++) {
+        segments[seg].addr = *cur_seg_pos++;
+        segments[seg].size = *cur_seg_pos++;
+        segments[seg].data = (uint8_t *)cur_seg_pos;
+        cur_seg_pos += (segments[seg].size) / 4;
+    }
+
+    // Download segments
+    for (seg=0; seg < header->segments; seg++) {
+        printf("Downloading %"PRIu32" bytes at 0x%08"PRIx32"...\n", segments[seg].size, segments[seg].addr);
+
+        err = esp_loader_mem_start(segments[seg].addr, segments[seg].size, ESP_RAM_BLOCK);
+        if (err != ESP_LOADER_SUCCESS) {
+            printf("Loading ram start with error %d.\n", err);
+            return err;
+        }
+
+        size_t remain_size = segments[seg].size;
+        uint8_t *data_pos = segments[seg].data;
+        while(remain_size > 0) {
+            size_t data_size = MIN(ESP_RAM_BLOCK, remain_size);
+            err = esp_loader_mem_write(data_pos, data_size);
+            if (err != ESP_LOADER_SUCCESS) {
+                printf("\nPacket could not be written! Error %d.\n", err);
+                return err;
+            }
+            data_pos += data_size;
+            remain_size -= data_size;
+        }
+    }
+
+    err = esp_loader_mem_finish(header->entrypoint);
+    if (err != ESP_LOADER_SUCCESS) {
+        printf("\nLoad ram finish with Error %d.\n", err);
+        return err;
+    }
+    printf("\nFinished loading\n");
+
+    return ESP_LOADER_SUCCESS;
+}
+

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/src/md5_hash.c

@@ -0,0 +1,262 @@
+/*
+ * MD5 hash implementation and interface functions
+ * Copyright (c) 2003-2005, Jouni Malinen <j@w1.fi>
+ *
+ * This software may be distributed under the terms of the BSD license.
+ * See README for more details.
+ */
+
+
+#include "md5_hash.h"
+#include <stdlib.h>
+#include <string.h>
+
+
+static void MD5Transform(uint32_t buf[4], uint32_t const in[16]);
+
+
+/* ===== start - public domain MD5 implementation ===== */
+/*
+ * This code implements the MD5 message-digest algorithm.
+ * The algorithm is due to Ron Rivest.  This code was
+ * written by Colin Plumb in 1993, no copyright is claimed.
+ * This code is in the public domain; do with it what you wish.
+ *
+ * Equivalent code is available from RSA Data Security, Inc.
+ * This code has been tested against that, and is equivalent,
+ * except that you don't need to include two pages of legalese
+ * with every copy.
+ *
+ * To compute the message digest of a chunk of bytes, declare an
+ * MD5Context structure, pass it to MD5Init, call MD5Update as
+ * needed on buffers full of bytes, and then call MD5Final, which
+ * will fill a supplied 16-byte array with the digest.
+ */
+
+#ifndef WORDS_BIGENDIAN
+#define byteReverse(buf, len)   /* Nothing */
+#else
+/*
+ * Note: this code is harmless on little-endian machines.
+ */
+static void byteReverse(unsigned char *buf, unsigned longs)
+{
+    uint32_t t;
+    do {
+        t = (uint32_t) ((unsigned) buf[3] << 8 | buf[2]) << 16 |
+            ((unsigned) buf[1] << 8 | buf[0]);
+        *(uint32_t *) buf = t;
+        buf += 4;
+    } while (--longs);
+}
+#endif
+
+/*
+ * Start MD5 accumulation.  Set bit count to 0 and buffer to mysterious
+ * initialization constants.
+ */
+void MD5Init(struct MD5Context *ctx)
+{
+    ctx->buf[0] = 0x67452301;
+    ctx->buf[1] = 0xefcdab89;
+    ctx->buf[2] = 0x98badcfe;
+    ctx->buf[3] = 0x10325476;
+
+    ctx->bits[0] = 0;
+    ctx->bits[1] = 0;
+}
+
+/*
+ * Update context to reflect the concatenation of another buffer full
+ * of bytes.
+ */
+void MD5Update(struct MD5Context *ctx, unsigned char const *buf, unsigned len)
+{
+    uint32_t t;
+
+    /* Update bitcount */
+
+    t = ctx->bits[0];
+    if ((ctx->bits[0] = t + ((uint32_t) len << 3)) < t) {
+        ctx->bits[1]++;    /* Carry from low to high */
+    }
+    ctx->bits[1] += len >> 29;
+
+    t = (t >> 3) & 0x3f;    /* Bytes already in shsInfo->data */
+
+    /* Handle any leading odd-sized chunks */
+
+    if (t) {
+        unsigned char *p = (unsigned char *) ctx->in + t;
+
+        t = 64 - t;
+        if (len < t) {
+            memcpy(p, buf, len);
+            return;
+        }
+        memcpy(p, buf, t);
+        byteReverse(ctx->in, 16);
+        MD5Transform((uint32_t *)ctx->buf, (uint32_t *) ctx->in);
+        buf += t;
+        len -= t;
+    }
+    /* Process data in 64-byte chunks */
+
+    while (len >= 64) {
+        memcpy(ctx->in, buf, 64);
+        byteReverse(ctx->in, 16);
+        MD5Transform((uint32_t *)ctx->buf, (uint32_t *) ctx->in);
+        buf += 64;
+        len -= 64;
+    }
+
+    /* Handle any remaining bytes of data. */
+
+    memcpy(ctx->in, buf, len);
+}
+
+/*
+ * Final wrapup - pad to 64-byte boundary with the bit pattern
+ * 1 0* (64-bit count of bits processed, MSB-first)
+ */
+void MD5Final(unsigned char digest[16], struct MD5Context *ctx)
+{
+    unsigned count;
+    unsigned char *p;
+
+    /* Compute number of bytes mod 64 */
+    count = (ctx->bits[0] >> 3) & 0x3F;
+
+    /* Set the first char of padding to 0x80.  This is safe since there is
+       always at least one byte free */
+    p = ctx->in + count;
+    *p++ = 0x80;
+
+    /* Bytes of padding needed to make 64 bytes */
+    count = 64 - 1 - count;
+
+    /* Pad out to 56 mod 64 */
+    if (count < 8) {
+        /* Two lots of padding:  Pad the first block to 64 bytes */
+        memset(p, 0, count);
+        byteReverse(ctx->in, 16);
+        MD5Transform((uint32_t *)ctx->buf, (uint32_t *) ctx->in);
+
+        /* Now fill the next block with 56 bytes */
+        memset(ctx->in, 0, 56);
+    } else {
+        /* Pad block to 56 bytes */
+        memset(p, 0, count - 8);
+    }
+    byteReverse(ctx->in, 14);
+
+    /* Append length in bits and transform */
+    ((uint32_t *) ctx->in)[14] = ctx->bits[0];
+    ((uint32_t *) ctx->in)[15] = ctx->bits[1];
+
+    MD5Transform((uint32_t *)ctx->buf, (uint32_t *) ctx->in);
+    byteReverse((unsigned char *) ctx->buf, 4);
+    memcpy(digest, ctx->buf, 16);
+    memset(ctx, 0, sizeof(struct MD5Context));  /* In case it's sensitive */
+}
+
+/* The four core functions - F1 is optimized somewhat */
+
+/* #define F1(x, y, z) (x & y | ~x & z) */
+#define F1(x, y, z) (z ^ (x & (y ^ z)))
+#define F2(x, y, z) F1(z, x, y)
+#define F3(x, y, z) (x ^ y ^ z)
+#define F4(x, y, z) (y ^ (x | ~z))
+
+/* This is the central step in the MD5 algorithm. */
+#define MD5STEP(f, w, x, y, z, data, s) \
+    ( w += f(x, y, z) + data,  w = w<<s | w>>(32-s),  w += x )
+
+/*
+ * The core of the MD5 algorithm, this alters an existing MD5 hash to
+ * reflect the addition of 16 longwords of new data.  MD5Update blocks
+ * the data and converts bytes into longwords for this routine.
+ */
+static void MD5Transform(uint32_t buf[4], uint32_t const in[16])
+{
+    register uint32_t a, b, c, d;
+
+    a = buf[0];
+    b = buf[1];
+    c = buf[2];
+    d = buf[3];
+
+    MD5STEP(F1, a, b, c, d, in[0] + 0xd76aa478, 7);
+    MD5STEP(F1, d, a, b, c, in[1] + 0xe8c7b756, 12);
+    MD5STEP(F1, c, d, a, b, in[2] + 0x242070db, 17);
+    MD5STEP(F1, b, c, d, a, in[3] + 0xc1bdceee, 22);
+    MD5STEP(F1, a, b, c, d, in[4] + 0xf57c0faf, 7);
+    MD5STEP(F1, d, a, b, c, in[5] + 0x4787c62a, 12);
+    MD5STEP(F1, c, d, a, b, in[6] + 0xa8304613, 17);
+    MD5STEP(F1, b, c, d, a, in[7] + 0xfd469501, 22);
+    MD5STEP(F1, a, b, c, d, in[8] + 0x698098d8, 7);
+    MD5STEP(F1, d, a, b, c, in[9] + 0x8b44f7af, 12);
+    MD5STEP(F1, c, d, a, b, in[10] + 0xffff5bb1, 17);
+    MD5STEP(F1, b, c, d, a, in[11] + 0x895cd7be, 22);
+    MD5STEP(F1, a, b, c, d, in[12] + 0x6b901122, 7);
+    MD5STEP(F1, d, a, b, c, in[13] + 0xfd987193, 12);
+    MD5STEP(F1, c, d, a, b, in[14] + 0xa679438e, 17);
+    MD5STEP(F1, b, c, d, a, in[15] + 0x49b40821, 22);
+
+    MD5STEP(F2, a, b, c, d, in[1] + 0xf61e2562, 5);
+    MD5STEP(F2, d, a, b, c, in[6] + 0xc040b340, 9);
+    MD5STEP(F2, c, d, a, b, in[11] + 0x265e5a51, 14);
+    MD5STEP(F2, b, c, d, a, in[0] + 0xe9b6c7aa, 20);
+    MD5STEP(F2, a, b, c, d, in[5] + 0xd62f105d, 5);
+    MD5STEP(F2, d, a, b, c, in[10] + 0x02441453, 9);
+    MD5STEP(F2, c, d, a, b, in[15] + 0xd8a1e681, 14);
+    MD5STEP(F2, b, c, d, a, in[4] + 0xe7d3fbc8, 20);
+    MD5STEP(F2, a, b, c, d, in[9] + 0x21e1cde6, 5);
+    MD5STEP(F2, d, a, b, c, in[14] + 0xc33707d6, 9);
+    MD5STEP(F2, c, d, a, b, in[3] + 0xf4d50d87, 14);
+    MD5STEP(F2, b, c, d, a, in[8] + 0x455a14ed, 20);
+    MD5STEP(F2, a, b, c, d, in[13] + 0xa9e3e905, 5);
+    MD5STEP(F2, d, a, b, c, in[2] + 0xfcefa3f8, 9);
+    MD5STEP(F2, c, d, a, b, in[7] + 0x676f02d9, 14);
+    MD5STEP(F2, b, c, d, a, in[12] + 0x8d2a4c8a, 20);
+
+    MD5STEP(F3, a, b, c, d, in[5] + 0xfffa3942, 4);
+    MD5STEP(F3, d, a, b, c, in[8] + 0x8771f681, 11);
+    MD5STEP(F3, c, d, a, b, in[11] + 0x6d9d6122, 16);
+    MD5STEP(F3, b, c, d, a, in[14] + 0xfde5380c, 23);
+    MD5STEP(F3, a, b, c, d, in[1] + 0xa4beea44, 4);
+    MD5STEP(F3, d, a, b, c, in[4] + 0x4bdecfa9, 11);
+    MD5STEP(F3, c, d, a, b, in[7] + 0xf6bb4b60, 16);
+    MD5STEP(F3, b, c, d, a, in[10] + 0xbebfbc70, 23);
+    MD5STEP(F3, a, b, c, d, in[13] + 0x289b7ec6, 4);
+    MD5STEP(F3, d, a, b, c, in[0] + 0xeaa127fa, 11);
+    MD5STEP(F3, c, d, a, b, in[3] + 0xd4ef3085, 16);
+    MD5STEP(F3, b, c, d, a, in[6] + 0x04881d05, 23);
+    MD5STEP(F3, a, b, c, d, in[9] + 0xd9d4d039, 4);
+    MD5STEP(F3, d, a, b, c, in[12] + 0xe6db99e5, 11);
+    MD5STEP(F3, c, d, a, b, in[15] + 0x1fa27cf8, 16);
+    MD5STEP(F3, b, c, d, a, in[2] + 0xc4ac5665, 23);
+
+    MD5STEP(F4, a, b, c, d, in[0] + 0xf4292244, 6);
+    MD5STEP(F4, d, a, b, c, in[7] + 0x432aff97, 10);
+    MD5STEP(F4, c, d, a, b, in[14] + 0xab9423a7, 15);
+    MD5STEP(F4, b, c, d, a, in[5] + 0xfc93a039, 21);
+    MD5STEP(F4, a, b, c, d, in[12] + 0x655b59c3, 6);
+    MD5STEP(F4, d, a, b, c, in[3] + 0x8f0ccc92, 10);
+    MD5STEP(F4, c, d, a, b, in[10] + 0xffeff47d, 15);
+    MD5STEP(F4, b, c, d, a, in[1] + 0x85845dd1, 21);
+    MD5STEP(F4, a, b, c, d, in[8] + 0x6fa87e4f, 6);
+    MD5STEP(F4, d, a, b, c, in[15] + 0xfe2ce6e0, 10);
+    MD5STEP(F4, c, d, a, b, in[6] + 0xa3014314, 15);
+    MD5STEP(F4, b, c, d, a, in[13] + 0x4e0811a1, 21);
+    MD5STEP(F4, a, b, c, d, in[4] + 0xf7537e82, 6);
+    MD5STEP(F4, d, a, b, c, in[11] + 0xbd3af235, 10);
+    MD5STEP(F4, c, d, a, b, in[2] + 0x2ad7d2bb, 15);
+    MD5STEP(F4, b, c, d, a, in[9] + 0xeb86d391, 21);
+
+    buf[0] += a;
+    buf[1] += b;
+    buf[2] += c;
+    buf[3] += d;
+}
+/* ===== end - public domain MD5 implementation ===== */

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/src/protocol_common.c

@@ -0,0 +1,301 @@
+/* Copyright 2020-2023 Espressif Systems (Shanghai) CO LTD
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "protocol.h"
+#include "protocol_prv.h"
+#include "esp_loader_io.h"
+#include <stddef.h>
+#include <string.h>
+
+#define CMD_SIZE(cmd) ( sizeof(cmd) - sizeof(command_common_t) )
+
+static uint32_t s_sequence_number = 0;
+
+static uint8_t compute_checksum(const uint8_t *data, uint32_t size)
+{
+    uint8_t checksum = 0xEF;
+
+    while (size--) {
+        checksum ^= *data++;
+    }
+
+    return checksum;
+}
+
+void log_loader_internal_error(error_code_t error)
+{
+    loader_port_debug_print("Error: ");
+
+    switch (error) {
+        case INVALID_CRC:     loader_port_debug_print("INVALID_CRC"); break;
+        case INVALID_COMMAND: loader_port_debug_print("INVALID_COMMAND"); break;
+        case COMMAND_FAILED:  loader_port_debug_print("COMMAND_FAILED"); break;
+        case FLASH_WRITE_ERR: loader_port_debug_print("FLASH_WRITE_ERR"); break;
+        case FLASH_READ_ERR:  loader_port_debug_print("FLASH_READ_ERR"); break;
+        case READ_LENGTH_ERR: loader_port_debug_print("READ_LENGTH_ERR"); break;
+        case DEFLATE_ERROR:   loader_port_debug_print("DEFLATE_ERROR"); break;
+        default:              loader_port_debug_print("UNKNOWN ERROR"); break;
+    }
+
+    loader_port_debug_print("\n");
+}
+
+
+esp_loader_error_t loader_flash_begin_cmd(uint32_t offset,
+                                          uint32_t erase_size,
+                                          uint32_t block_size,
+                                          uint32_t blocks_to_write,
+                                          bool encryption)
+{
+    flash_begin_command_t flash_begin_cmd = {
+        .common = {
+            .direction = WRITE_DIRECTION,
+            .command = FLASH_BEGIN,
+            .size = CMD_SIZE(flash_begin_cmd) - (encryption ? 0 : sizeof(uint32_t)),
+            .checksum = 0
+        },
+        .erase_size = erase_size,
+        .packet_count = blocks_to_write,
+        .packet_size = block_size,
+        .offset = offset,
+        .encrypted = 0
+    };
+
+    s_sequence_number = 0;
+
+    return send_cmd(&flash_begin_cmd,
+                    sizeof(flash_begin_cmd) - (encryption ? 0 : sizeof(uint32_t)),
+                    NULL);
+}
+
+
+esp_loader_error_t loader_flash_data_cmd(const uint8_t *data, uint32_t size)
+{
+    data_command_t data_cmd = {
+        .common = {
+            .direction = WRITE_DIRECTION,
+            .command = FLASH_DATA,
+            .size = CMD_SIZE(data_cmd) + size,
+            .checksum = compute_checksum(data, size)
+        },
+        .data_size = size,
+        .sequence_number = s_sequence_number++,
+    };
+
+    return send_cmd_with_data(&data_cmd, sizeof(data_cmd), data, size);
+}
+
+
+esp_loader_error_t loader_flash_end_cmd(bool stay_in_loader)
+{
+    flash_end_command_t end_cmd = {
+        .common = {
+            .direction = WRITE_DIRECTION,
+            .command = FLASH_END,
+            .size = CMD_SIZE(end_cmd),
+            .checksum = 0
+        },
+        .stay_in_loader = stay_in_loader
+    };
+
+    return send_cmd(&end_cmd, sizeof(end_cmd), NULL);
+}
+
+
+esp_loader_error_t loader_mem_begin_cmd(uint32_t offset, uint32_t size, uint32_t blocks_to_write, uint32_t block_size)
+{
+
+    mem_begin_command_t mem_begin_cmd = {
+        .common = {
+            .direction = WRITE_DIRECTION,
+            .command = MEM_BEGIN,
+            .size = CMD_SIZE(mem_begin_cmd),
+            .checksum = 0
+        },
+        .total_size = size,
+        .blocks = blocks_to_write,
+        .block_size = block_size,
+        .offset = offset
+    };
+
+    s_sequence_number = 0;
+
+    return send_cmd(&mem_begin_cmd, sizeof(mem_begin_cmd), NULL);
+}
+
+
+esp_loader_error_t loader_mem_data_cmd(const uint8_t *data, uint32_t size)
+{
+    data_command_t data_cmd = {
+        .common = {
+            .direction = WRITE_DIRECTION,
+            .command = MEM_DATA,
+            .size = CMD_SIZE(data_cmd) + size,
+            .checksum = compute_checksum(data, size)
+        },
+        .data_size = size,
+        .sequence_number = s_sequence_number++,
+    };
+    return send_cmd_with_data(&data_cmd, sizeof(data_cmd), data, size);
+}
+
+esp_loader_error_t loader_mem_end_cmd(uint32_t entrypoint)
+{
+    mem_end_command_t end_cmd = {
+        .common = {
+            .direction = WRITE_DIRECTION,
+            .command = MEM_END,
+            .size = CMD_SIZE(end_cmd),
+        },
+        .stay_in_loader = (entrypoint == 0),
+        .entry_point_address = entrypoint
+    };
+
+    return send_cmd(&end_cmd, sizeof(end_cmd), NULL);
+}
+
+
+esp_loader_error_t loader_sync_cmd(void)
+{
+    sync_command_t sync_cmd = {
+        .common = {
+            .direction = WRITE_DIRECTION,
+            .command = SYNC,
+            .size = CMD_SIZE(sync_cmd),
+            .checksum = 0
+        },
+        .sync_sequence = {
+            0x07, 0x07, 0x12, 0x20,
+            0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55,
+            0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55,
+            0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55,
+            0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55,
+        }
+    };
+
+    return send_cmd(&sync_cmd, sizeof(sync_cmd), NULL);
+}
+
+
+esp_loader_error_t loader_write_reg_cmd(uint32_t address, uint32_t value,
+                                        uint32_t mask, uint32_t delay_us)
+{
+    write_reg_command_t write_cmd = {
+        .common = {
+            .direction = WRITE_DIRECTION,
+            .command = WRITE_REG,
+            .size = CMD_SIZE(write_cmd),
+            .checksum = 0
+        },
+        .address = address,
+        .value = value,
+        .mask = mask,
+        .delay_us = delay_us
+    };
+
+    return send_cmd(&write_cmd, sizeof(write_cmd), NULL);
+}
+
+
+esp_loader_error_t loader_read_reg_cmd(uint32_t address, uint32_t *reg)
+{
+    read_reg_command_t read_cmd = {
+        .common = {
+            .direction = WRITE_DIRECTION,
+            .command = READ_REG,
+            .size = CMD_SIZE(read_cmd),
+            .checksum = 0
+        },
+        .address = address,
+    };
+
+    return send_cmd(&read_cmd, sizeof(read_cmd), reg);
+}
+
+
+esp_loader_error_t loader_spi_attach_cmd(uint32_t config)
+{
+    spi_attach_command_t attach_cmd = {
+        .common = {
+            .direction = WRITE_DIRECTION,
+            .command = SPI_ATTACH,
+            .size = CMD_SIZE(attach_cmd),
+            .checksum = 0
+        },
+        .configuration = config,
+        .zero = 0
+    };
+
+    return send_cmd(&attach_cmd, sizeof(attach_cmd), NULL);
+}
+
+esp_loader_error_t loader_change_baudrate_cmd(uint32_t baudrate)
+{
+    change_baudrate_command_t baudrate_cmd = {
+        .common = {
+            .direction = WRITE_DIRECTION,
+            .command = CHANGE_BAUDRATE,
+            .size = CMD_SIZE(baudrate_cmd),
+            .checksum = 0
+        },
+        .new_baudrate = baudrate,
+        .old_baudrate = 0 // ESP32 ROM only
+    };
+
+    return send_cmd(&baudrate_cmd, sizeof(baudrate_cmd), NULL);
+}
+
+esp_loader_error_t loader_md5_cmd(uint32_t address, uint32_t size, uint8_t *md5_out)
+{
+    spi_flash_md5_command_t md5_cmd = {
+        .common = {
+            .direction = WRITE_DIRECTION,
+            .command = SPI_FLASH_MD5,
+            .size = CMD_SIZE(md5_cmd),
+            .checksum = 0
+        },
+        .address = address,
+        .size = size,
+        .reserved_0 = 0,
+        .reserved_1 = 0
+    };
+
+    return send_cmd_md5(&md5_cmd, sizeof(md5_cmd), md5_out);
+}
+
+esp_loader_error_t loader_spi_parameters(uint32_t total_size)
+{
+    write_spi_command_t spi_cmd = {
+        .common = {
+            .direction = WRITE_DIRECTION,
+            .command = SPI_SET_PARAMS,
+            .size = 24,
+            .checksum = 0
+        },
+        .id = 0,
+        .total_size = total_size,
+        .block_size = 64 * 1024,
+        .sector_size = 4 * 1024,
+        .page_size = 0x100,
+        .status_mask = 0xFFFF,
+    };
+
+    return send_cmd(&spi_cmd, sizeof(spi_cmd), NULL);
+}
+
+__attribute__ ((weak)) void loader_port_debug_print(const char *str)
+{
+
+}

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/src/protocol_uart.c

@@ -0,0 +1,114 @@
+/* Copyright 2020-2023 Espressif Systems (Shanghai) CO LTD
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "protocol.h"
+#include "protocol_prv.h"
+#include "esp_loader_io.h"
+#include "slip.h"
+#include <stddef.h>
+#include <string.h>
+
+static esp_loader_error_t check_response(command_t cmd, uint32_t *reg_value, void* resp, uint32_t resp_size);
+
+esp_loader_error_t loader_initialize_conn(esp_loader_connect_args_t *connect_args) {
+    esp_loader_error_t err;
+    int32_t trials = connect_args->trials;
+
+    do {
+        loader_port_start_timer(connect_args->sync_timeout);
+        err = loader_sync_cmd();
+        if (err == ESP_LOADER_ERROR_TIMEOUT) {
+            if (--trials == 0) {
+                return ESP_LOADER_ERROR_TIMEOUT;
+            }
+            loader_port_delay_ms(100);
+        } else if (err != ESP_LOADER_SUCCESS) {
+            return err;
+        }
+    } while (err != ESP_LOADER_SUCCESS);
+
+    return err;
+}
+
+esp_loader_error_t send_cmd(const void *cmd_data, uint32_t size, uint32_t *reg_value)
+{
+    response_t response;
+    command_t command = ((const command_common_t *)cmd_data)->command;
+
+    RETURN_ON_ERROR( SLIP_send_delimiter() );
+    RETURN_ON_ERROR( SLIP_send((const uint8_t *)cmd_data, size) );
+    RETURN_ON_ERROR( SLIP_send_delimiter() );
+
+    return check_response(command, reg_value, &response, sizeof(response));
+}
+
+
+esp_loader_error_t send_cmd_with_data(const void *cmd_data, size_t cmd_size,
+                                      const void *data, size_t data_size)
+{
+    response_t response;
+    command_t command = ((const command_common_t *)cmd_data)->command;
+
+    RETURN_ON_ERROR( SLIP_send_delimiter() );
+    RETURN_ON_ERROR( SLIP_send((const uint8_t *)cmd_data, cmd_size) );
+    RETURN_ON_ERROR( SLIP_send(data, data_size) );
+    RETURN_ON_ERROR( SLIP_send_delimiter() );
+
+    return check_response(command, NULL, &response, sizeof(response));
+}
+
+
+esp_loader_error_t send_cmd_md5(const void *cmd_data, size_t cmd_size, uint8_t md5_out[MD5_SIZE])
+{
+    rom_md5_response_t response;
+    command_t command = ((const command_common_t *)cmd_data)->command;
+
+    RETURN_ON_ERROR( SLIP_send_delimiter() );
+    RETURN_ON_ERROR( SLIP_send((const uint8_t *)cmd_data, cmd_size) );
+    RETURN_ON_ERROR( SLIP_send_delimiter() );
+
+    RETURN_ON_ERROR( check_response(command, NULL, &response, sizeof(response)) );
+
+    memcpy(md5_out, response.md5, MD5_SIZE);
+
+    return ESP_LOADER_SUCCESS;
+}
+
+
+static esp_loader_error_t check_response(command_t cmd, uint32_t *reg_value, void* resp, uint32_t resp_size)
+{
+    esp_loader_error_t err;
+    common_response_t *response = (common_response_t *)resp;
+
+    do {
+        err = SLIP_receive_packet(resp, resp_size);
+        if (err != ESP_LOADER_SUCCESS) {
+            return err;
+        }
+    } while ((response->direction != READ_DIRECTION) || (response->command != cmd));
+
+    response_status_t *status = (response_status_t *)((uint8_t *)resp + resp_size - sizeof(response_status_t));
+
+    if (status->failed) {
+        log_loader_internal_error(status->error);
+        return ESP_LOADER_ERROR_INVALID_RESPONSE;
+    }
+
+    if (reg_value != NULL) {
+        *reg_value = response->value;
+    }
+
+    return ESP_LOADER_SUCCESS;
+}

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/src/slip.c

@@ -0,0 +1,125 @@
+/* Copyright 2020-2023 Espressif Systems (Shanghai) CO LTD
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "slip.h"
+#include "esp_loader_io.h"
+
+static const uint8_t DELIMITER = 0xC0;
+static const uint8_t C0_REPLACEMENT[2] = {0xDB, 0xDC};
+static const uint8_t DB_REPLACEMENT[2] = {0xDB, 0xDD};
+
+static inline esp_loader_error_t peripheral_read(uint8_t *buff, const size_t size)
+{
+    return loader_port_read(buff, size, loader_port_remaining_time());
+}
+
+static inline esp_loader_error_t peripheral_write(const uint8_t *buff, const size_t size)
+{
+    return loader_port_write(buff, size, loader_port_remaining_time());
+}
+
+esp_loader_error_t SLIP_receive_data(uint8_t *buff, const size_t size)
+{
+    uint8_t ch;
+
+    for (uint32_t i = 0; i < size; i++) {
+        RETURN_ON_ERROR( peripheral_read(&ch, 1) );
+
+        if (ch == 0xDB) {
+            RETURN_ON_ERROR( peripheral_read(&ch, 1) );
+            if (ch == 0xDC) {
+                buff[i] = 0xC0;
+            } else if (ch == 0xDD) {
+                buff[i] = 0xDB;
+            } else {
+                return ESP_LOADER_ERROR_INVALID_RESPONSE;
+            }
+        } else {
+            buff[i] = ch;
+        }
+    }
+
+    return ESP_LOADER_SUCCESS;
+}
+
+
+esp_loader_error_t SLIP_receive_packet(uint8_t *buff, const size_t size)
+{
+    uint8_t ch;
+
+    // Wait for delimiter
+    do {
+        RETURN_ON_ERROR( peripheral_read(&ch, 1) );
+    } while (ch != DELIMITER);
+
+    // Workaround: bootloader sends two dummy(0xC0) bytes after response when baud rate is changed.
+    do {
+        RETURN_ON_ERROR( peripheral_read(&ch, 1) );
+    } while (ch == DELIMITER);
+
+    buff[0] = ch;
+
+    RETURN_ON_ERROR( SLIP_receive_data(&buff[1], size - 1) );
+
+    // Wait for delimiter
+    do {
+        RETURN_ON_ERROR( peripheral_read(&ch, 1) );
+    } while (ch != DELIMITER);
+
+    return ESP_LOADER_SUCCESS;
+}
+
+
+esp_loader_error_t SLIP_send(const uint8_t *data, const size_t size)
+{
+    uint32_t to_write = 0;  // Bytes ready to write as they are
+    uint32_t written = 0;   // Bytes already written
+
+    for (uint32_t i = 0; i < size; i++) {
+        if (data[i] != 0xC0 && data[i] != 0xDB) {
+            to_write++; // Queue this byte for writing
+            continue;
+        }
+
+        // We have a byte that needs encoding, write the queue first
+        if (to_write > 0) {
+            RETURN_ON_ERROR( peripheral_write(&data[written], to_write) );
+        }
+
+        // Write the encoded byte
+        if (data[i] == 0xC0) {
+            RETURN_ON_ERROR( peripheral_write(C0_REPLACEMENT, 2) );
+        } else {
+            RETURN_ON_ERROR( peripheral_write(DB_REPLACEMENT, 2) );
+        }
+
+        // Update to start again after the encoded byte
+        written = i + 1;
+        to_write = 0;
+    }
+
+    // Write the rest of the bytes that didn't need encoding
+    if (to_write > 0) {
+        RETURN_ON_ERROR( peripheral_write(&data[written], to_write) );
+    }
+
+    return ESP_LOADER_SUCCESS;
+}
+
+
+esp_loader_error_t SLIP_send_delimiter(void)
+{
+    return peripheral_write(&DELIMITER, 1);
+}

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/submodules/CMakeLists.txt

@@ -0,0 +1,20 @@
+
+cmake_minimum_required(VERSION 3.13)
+
+set(CMAKE_TOOLCHAIN_FILE ${CMAKE_CURRENT_LIST_DIR}/stm32-cmake/cmake/gcc_stm32.cmake)
+set(CMAKE_MODULE_PATH    ${CMAKE_CURRENT_LIST_DIR}/stm32-cmake/cmake)
+
+find_package(CMSIS REQUIRED)
+find_package(STM32HAL COMPONENTS gpio tim uart REQUIRED)
+
+add_library(stm_cube_impl ${CMSIS_SOURCES} ${STM32HAL_SOURCES})
+target_include_directories(stm_cube_impl PUBLIC ${CMSIS_INCLUDE_DIRS} ${STM32HAL_INCLUDE_DIR})
+stm32_set_target_properties(stm_cube_impl)
+
+# stm_cube target is made to propagate properties of stm_cube_impl, as stm32_set_target_properties 
+# sets properties privately for given target. This eliminates need to call stm32_set_target_properties
+# on every target that links against STM32HAL.
+add_library(stm_cube INTERFACE)
+target_link_libraries(stm_cube INTERFACE stm_cube_impl)
+target_compile_definitions(stm_cube INTERFACE $<TARGET_PROPERTY:stm_cube_impl,COMPILE_DEFINITIONS>)
+target_link_options(stm_cube INTERFACE -T${CMAKE_CURRENT_BINARY_DIR}/stm_cube_impl_flash.ld)

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/test/CMakeLists.txt

@@ -0,0 +1,29 @@
+cmake_minimum_required(VERSION 3.5)
+project(serial_flasher_test)
+
+add_executable( ${PROJECT_NAME}
+	test_main.cpp
+	../src/esp_loader.c
+	../src/esp_targets.c
+	../src/md5_hash.c
+	../src/protocol_common.c
+	../src/protocol_uart.c
+	../src/slip.c)
+
+target_include_directories(${PROJECT_NAME} PRIVATE ../include ../private_include ../test ../port)
+
+target_compile_options(${PROJECT_NAME} PRIVATE -Wall -Werror -O3)
+
+set_property(TARGET ${PROJECT_NAME} PROPERTY CXX_STANDARD 14)
+
+if( QEMU_TEST )
+    target_sources(${PROJECT_NAME} PRIVATE serial_io_tcp.cpp qemu_test.cpp)
+else()
+    target_sources(${PROJECT_NAME} PRIVATE serial_io_mock.cpp test.cpp)
+endif()
+
+target_compile_definitions(${PROJECT_NAME} PRIVATE
+	MD5_ENABLED=1
+	SERIAL_FLASHER_INTERFACE_UART
+	SERIAL_FLASHER_DEBUG_TRACE
+)

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/test/README.md

@@ -0,0 +1,30 @@
+
+# Serial flasher Tests
+
+##Overview
+
+Two kinds of tests are written for serial flasher:
+
+* Host tests 
+* Qemu tests
+
+Qemu tests uses emulated esp32 to test correctness of the library. 
+
+## Installation (Only for qemu tests)
+
+Please refer to [building qemu](https://github.com/espressif/qemu) for instructions how to compile.
+
+## Build and run
+
+### Qemu test
+
+QEMU_PATH environment variable pointing to compiled `qemu/build/xtensa-softmmu/qemu-system-xtensa` has to be defined.
+```
+export QEMU_PATH=path_to_qemu-system-xtensa
+./run_test.sh qemu
+```
+
+### Host test
+```
+./run_test.sh host
+```

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/test/qemu_test.cpp

@@ -0,0 +1,121 @@
+/* Copyright 2018-2023 Espressif Systems (Shanghai) CO LTD
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "catch.hpp"
+#include "serial_io_mock.h"
+#include "esp_loader.h"
+#include "esp_loader_io.h"
+#include <algorithm>
+#include <iostream>
+#include <fstream>
+
+using namespace std;
+
+
+#define ESP_ERR_CHECK(exp) REQUIRE( (exp) == ESP_LOADER_SUCCESS )
+
+const uint32_t APP_START_ADDRESS = 0x10000;
+
+
+TEST_CASE( "Can connect " )
+{
+    esp_loader_connect_args_t connect_config = ESP_LOADER_CONNECT_DEFAULT();
+
+    ESP_ERR_CHECK( esp_loader_connect(&connect_config) );
+    REQUIRE( esp_loader_get_target() == ESP32_CHIP );
+}
+
+
+inline auto file_size_is(ifstream& file)
+{
+    uint32_t file_size;
+
+    file.seekg(0, ios::end);
+    file_size = file.tellg();
+    file.seekg(0);
+
+    return file_size;
+}
+
+void flash_application(ifstream& image)
+{
+    uint8_t payload[1024];
+    int32_t count = 0;
+    size_t image_size = file_size_is(image);
+
+    ESP_ERR_CHECK( esp_loader_flash_start(APP_START_ADDRESS, image_size, sizeof(payload)) );
+
+    while(image_size > 0) {
+        size_t to_read = min(image_size, sizeof(payload));
+
+        image.read((char *)payload, to_read);
+
+        ESP_ERR_CHECK( esp_loader_flash_write(payload, to_read) );
+
+        cout << endl << "--- FLASH DATA PACKET: " << count++
+             <<  " DATA WRITTEN: " << to_read << " ---" << endl;
+
+        image_size -= to_read;
+    };
+
+    // Omit restart
+    // loader_flash_finish(false);
+}
+
+bool file_compare(ifstream& file_1, ifstream& file_2, size_t file_size)
+{
+    vector<char> file_data_1(file_size);
+    vector<char> file_data_2(file_size);
+
+    file_1.read((char*) &file_data_1[0], file_size);
+    file_2.read((char*) &file_data_2[0], file_size);
+
+    return file_data_1 == file_data_2;
+}
+
+
+TEST_CASE( "Can write application to flash" )
+{
+    ifstream new_image;
+    ifstream qemu_image;
+
+    new_image.open ("../hello-world.bin", ios::binary | ios::in);
+    qemu_image.open ("empty_file.bin", ios::binary | ios::in);
+
+    REQUIRE ( new_image.is_open() );
+    REQUIRE ( qemu_image.is_open() );
+
+    flash_application(new_image);
+
+    auto new_image_size = file_size_is(new_image);
+    qemu_image.seekg(APP_START_ADDRESS);
+    new_image.seekg(0);
+
+    REQUIRE ( file_compare(new_image, qemu_image, new_image_size) );
+
+    ESP_ERR_CHECK ( esp_loader_flash_verify() );
+
+    // NOTE: loader_flash_finish() is not called to prevent reset of target
+}
+
+TEST_CASE( "Can write and read register" )
+{
+    uint32_t reg_value = 0;
+    uint32_t SPI_MOSI_DLEN_REG = 0x60002000 + 0x28;
+
+    ESP_ERR_CHECK( esp_loader_write_register(SPI_MOSI_DLEN_REG, 55) );
+    ESP_ERR_CHECK( esp_loader_read_register(SPI_MOSI_DLEN_REG, &reg_value) );
+    REQUIRE ( reg_value == 55 );
+}

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/test/run_test.sh

@@ -0,0 +1,33 @@
+#!/bin/bash
+
+set -e
+mkdir -p build && cd build
+
+if [ "$1" = "host" ]; then
+    cmake -DQEMU_TEST=False .. && cmake --build . && ./serial_flasher_test
+elif [ "$1" = "qemu" ]; then
+    # QEMU_PATH environment variable has to be defined, pointing to qemu-system-xtensa
+    # Example: export QEMU_PATH=/home/user/esp/qemu/xtensa-softmmu/qemu-system-xtensa
+    if [ -z "${QEMU_PATH}" ]; then
+        echo "QEMU_PATH environment variable needs to be set"
+        exit 1
+    fi
+
+    # Generate empty file into which application will be flashed and compared against
+    dd if=/dev/zero bs=1024 count=4096 of="empty_file.bin"
+
+    # Run qemu in background (daemonized)
+    ${QEMU_PATH} \
+        -daemonize \
+        -machine esp32 \
+        -drive file=empty_file.bin,if=mtd,format=raw \
+        -global driver=esp32.gpio,property=strap_mode,value=0x0f \
+        -serial tcp::5555,server,nowait
+
+    cmake -DQEMU_TEST=True .. && cmake --build . && ./serial_flasher_test
+
+    # Kill qemu process running in background
+    kill -9 $(pidof qemu-system-xtensa)
+else
+    echo "Please select which test to run: qemu or host"
+fi

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/test/serial_io_mock.cpp

@@ -0,0 +1,158 @@
+/* Copyright 2018-2023 Espressif Systems (Shanghai) CO LTD
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <limits>
+#include <vector>
+#include <iterator>
+#include <algorithm>
+#include <iostream>
+#include <stdio.h>
+#include "esp_loader_io.h"
+#include "serial_io_mock.h"
+
+using namespace std;
+
+static vector<int8_t> write_buffer;
+static vector<int8_t> read_buffer;
+static uint32_t receive_delay = 0;
+static int32_t timer = 0;
+
+
+esp_loader_error_t loader_port_mock_init(const loader_serial_config_t *config)
+{
+    return ESP_LOADER_SUCCESS;
+}
+
+void loader_port_mock_deinit()
+{
+
+}
+
+esp_loader_error_t loader_port_write(const uint8_t *data, uint16_t size, uint32_t timeout)
+{
+    copy(&data[0], &data[size], back_inserter(write_buffer));
+
+    return ESP_LOADER_SUCCESS;
+}
+
+esp_loader_error_t loader_port_read(uint8_t *data, uint16_t size, uint32_t timeout)
+{
+    if (read_buffer.size() < size) {
+        return ESP_LOADER_ERROR_TIMEOUT;
+    }
+
+    if (receive_delay != 0 && timeout != 0) {
+        if (receive_delay > timeout) {
+            receive_delay -= timeout;
+            return ESP_LOADER_ERROR_TIMEOUT;
+        }
+        receive_delay = 0;
+    }
+
+    copy_n(read_buffer.begin(), size, data);
+    read_buffer.erase(read_buffer.begin(), read_buffer.begin() + size);
+
+    return ESP_LOADER_SUCCESS;
+}
+
+void loader_port_enter_bootloader()
+{
+    // GPIO0 and GPIO2 must be LOW
+    // Then Reset
+}
+
+void loader_port_reset_target()
+{
+
+}
+
+void loader_port_delay_ms(uint32_t ms)
+{
+
+}
+
+
+void loader_port_start_timer(uint32_t ms)
+{
+    timer = (int32_t)ms;
+}
+
+
+uint32_t loader_port_remaining_time(void)
+{
+    return (timer > 0) ? timer : 0;
+}
+
+
+
+// ----------  For testing purposes only  ----------
+
+static void SLIP_encode(const int8_t *in_buff, size_t size, vector<int8_t> &encoded_buff)
+{
+    encoded_buff.push_back('\xc0');
+
+    for (uint32_t i = 0; i < size; i++) {
+        if (in_buff[i] == '\xc0') {
+            encoded_buff.push_back('\xdb');
+            encoded_buff.push_back('\xdc');
+        } else if (in_buff[i] == '\xdb') {
+            encoded_buff.push_back('\xdb');
+            encoded_buff.push_back('\xdd');
+        } else {
+            encoded_buff.push_back(in_buff[i]);
+        }
+    }
+
+    encoded_buff.push_back('\xc0');
+}
+
+void clear_buffers()
+{
+    write_buffer.clear();
+    read_buffer.clear();
+}
+
+int8_t *write_buffer_data()
+{
+    return write_buffer.data();
+}
+
+size_t write_buffer_size()
+{
+    return write_buffer.size();
+}
+
+void set_read_buffer(const void *data, size_t size)
+{
+    SLIP_encode((const int8_t *)data, size, read_buffer);
+}
+
+void print_array(int8_t *data, uint32_t size)
+{
+    for (uint32_t i = 0; i < size; i++) {
+        printf("%02x, ", (uint8_t)data[i]);
+    }
+    printf("\n");
+}
+
+void write_buffer_print()
+{
+    print_array(write_buffer.data(), write_buffer.size());
+}
+
+void serial_set_time_delay(uint32_t miliseconds)
+{
+    receive_delay = miliseconds;
+}

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/test/serial_io_mock.h

@@ -0,0 +1,38 @@
+/* Copyright 2018-2023 Espressif Systems (Shanghai) CO LTD
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#pragma once
+
+#include <stdint.h>
+#include <stddef.h>
+#include "esp_loader.h"
+
+void clear_buffers();
+
+void write_buffer_print();
+size_t write_buffer_size();
+int8_t* write_buffer_data();
+
+void set_read_buffer(const void *data, size_t size);
+void print_array(int8_t *data, uint32_t size);
+void serial_set_time_delay(uint32_t miliseconds);
+
+
+typedef struct {
+    uint32_t dummy;
+} loader_serial_config_t;
+
+esp_loader_error_t loader_port_mock_init(const loader_serial_config_t *config);
+void loader_port_mock_deinit();

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/test/serial_io_tcp.cpp

@@ -0,0 +1,167 @@
+/* Copyright 2018-2023 Espressif Systems (Shanghai) CO LTD
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "esp_loader_io.h"
+#include "serial_io_mock.h"
+
+#include <sys/socket.h>
+#include <arpa/inet.h>
+#include <unistd.h>
+#include <string.h>
+
+#include <chrono>
+#include <thread>
+
+#include <iostream>
+#include <fstream>
+
+using namespace std;
+
+const uint32_t PORT = 5555;
+static int sock = 0;
+ofstream file;
+
+#ifdef SERIAL_FLASHER_DEBUG_TRACE
+static void transfer_debug_print(const uint8_t *data, uint16_t size, bool write)
+{
+    static bool write_prev = false;
+
+    if (write_prev != write) {
+        write_prev = write;
+        cout << endl << "--- " << (write ? "WRITE" : "READ") << " ---" << endl;
+    }
+
+    for (uint32_t i = 0; i < size; i++) {
+        cout << hex << static_cast<unsigned int>(data[i]) << dec << ' ';
+    }
+}
+#endif
+
+esp_loader_error_t loader_port_mock_init(const loader_serial_config_t *config)
+{
+    struct sockaddr_in serv_addr;
+
+    if ((sock = socket(AF_INET, SOCK_STREAM, 0)) < 0) {
+        cout << "Socket creation error \n";
+        return ESP_LOADER_ERROR_FAIL;
+    }
+
+    serv_addr.sin_family = AF_INET;
+    serv_addr.sin_port = htons(PORT);
+
+    // Convert IPv4 and IPv6 addresses from text to binary form
+    if (inet_pton(AF_INET, "127.0.0.1", &serv_addr.sin_addr) <= 0) {
+        cout << "Invalid address/ Address not supported \n";
+        return ESP_LOADER_ERROR_FAIL;
+    }
+
+    if (connect(sock, (struct sockaddr *)&serv_addr, sizeof(serv_addr)) < 0) {
+        cout << "Connection Failed \n";
+        return ESP_LOADER_ERROR_FAIL;
+    }
+
+    file.open ("received_data.bin", ios::binary | ios::out);
+    if (!file.is_open()) {
+        cout << "Cannot open file\n";
+        return ESP_LOADER_ERROR_FAIL;
+    }
+
+    return ESP_LOADER_SUCCESS;
+}
+
+
+void loader_port_mock_deinit()
+{
+    if (sock != 0) {
+        shutdown(sock, 0);
+        close(sock);
+    }
+
+    if (file.is_open()) {
+        file.close();
+    }
+}
+
+
+esp_loader_error_t loader_port_write(const uint8_t *data, uint16_t size, uint32_t timeout)
+{
+    uint32_t written = 0;
+
+    do {
+        int bytes_written = send(sock, &data[written], size - written, 0);
+        if (bytes_written == -1) {
+            cout << "Socket send failed\n";
+            return ESP_LOADER_ERROR_FAIL;
+        }
+#ifdef SERIAL_FLASHER_DEBUG_TRACE
+        transfer_debug_print(data, bytes_written, true);
+#endif
+        written += bytes_written;
+    } while (written != size);
+    return ESP_LOADER_SUCCESS;
+}
+
+esp_loader_error_t loader_port_read(uint8_t *data, uint16_t size, uint32_t timeout)
+{
+    uint32_t written = 0;
+    int bytes_read = 0;
+
+    do {
+        bytes_read = read(sock, &data[written], size - written);
+        if (bytes_read == 0) {
+            cout << "Socket connection lost\n";
+            return ESP_LOADER_ERROR_FAIL;
+        }
+
+#ifdef SERIAL_FLASHER_DEBUG_TRACE
+        transfer_debug_print(data, bytes_read, false);
+#endif
+
+        file.write((const char*)&data[written], bytes_read);
+        file.flush();
+
+        written += bytes_read;
+    } while (written != size);
+
+
+    return ESP_LOADER_SUCCESS;
+}
+
+void loader_port_enter_bootloader()
+{
+    // GPIO0 and GPIO2 must be LOW
+    // Then Reset
+}
+
+void loader_port_reset_target()
+{
+    // Toggle reset pin
+}
+
+void loader_port_delay_ms(uint32_t ms)
+{
+    this_thread::sleep_for(chrono::milliseconds(ms));
+}
+
+void loader_port_start_timer(uint32_t ms)
+{
+    (void)ms;
+}
+
+
+uint32_t loader_port_remaining_time(void)
+{
+    return 1;
+}

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/test/test.cpp

@@ -0,0 +1,398 @@
+/* Copyright 2020-2023 Espressif Systems (Shanghai) CO LTD
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "catch.hpp"
+#include "protocol.h"
+#include "serial_io_mock.h"
+#include "esp_loader.h"
+#include "esp_loader_io.h"
+#include <string.h>
+#include <stdio.h>
+#include <array>
+#include <map>
+#include <iostream>
+#include <algorithm>
+
+using namespace std;
+
+
+#define TEST_SLIP_PACKET 0xdb, 'a', 'b', 'c', 0xc0, 0xdb, 'd', 'e', 0xc0, 'f', 0xdb
+
+#define SLIP_ENCODED_PACKET 0xdb, 0xdd, 'a', 'b', 'c', 0xdb, 0xdc, 0xdb, \
+                            0xdd, 'd', 'e', 0xdb, 0xdc, 'f', 0xdb, 0xdd
+
+#define REQUIRE_SUCCESS(exp) REQUIRE( (exp) == ESP_LOADER_SUCCESS )
+
+// Helper function for debugging.
+__attribute__((unused))
+static void arrays_match(void *array_1, void *array_2, size_t size)
+{
+    int8_t *arr_1 = (int8_t *)array_1;
+    int8_t *arr_2 = (int8_t *)array_2;
+
+    for (size_t i = 0; i < size; i++) {
+        if (arr_1[i] != arr_2[i]) {
+            printf("\nArrays do NOT match on index: %lu, with values %02hhx, %02hhx \n",
+                   i, arr_1[i], arr_2[i]);
+
+            printf("\nExpected: ");
+            for (uint32_t j = 0; j < size; j++) { printf("%02hhx ", arr_1[j]); }
+            printf("\nActual:   ");
+            for (uint32_t j = 0; j < size; j++) { printf("%02hhx ", arr_2[j]); }
+
+            return;
+        }
+    }
+    printf("Arrays Match\n");
+}
+
+
+// Wrapper around command_t for convenience
+struct __attribute__((packed)) expected_response {
+    expected_response(command_t cmd)
+    {
+        data.common.direction = READ_DIRECTION;
+        data.common.command = cmd;
+        data.common.size = 16;
+        data.common.value = 0;
+        data.status.failed = STATUS_SUCCESS;
+        data.status.error = 0;
+    }
+
+    response_t data;
+};
+
+static_assert(sizeof(expected_response) == sizeof(response_t), "Size NOT equal");
+
+inline void queue_response(expected_response &response, size_t size = sizeof(expected_response))
+{
+    set_read_buffer(&response, size);
+}
+
+expected_response set_params_response(SPI_SET_PARAMS);
+expected_response flash_begin_response(FLASH_BEGIN);
+expected_response flash_data_response(FLASH_DATA);
+expected_response flash_end_response(FLASH_END);
+expected_response write_reg_response(WRITE_REG);
+expected_response read_reg_response(READ_REG);
+expected_response attach_response(SPI_ATTACH);
+expected_response sync_response(SYNC);
+
+const uint32_t reg_address = 0x1000;
+const uint32_t reg_value = 55;
+
+struct __attribute__((packed)) write_reg_cmd_response {
+    uint8_t delimiter_1 = 0xc0;
+    write_reg_command_t write_reg_cmd  = {
+        .common = {
+            .direction = WRITE_DIRECTION,
+            .command = WRITE_REG,
+            .size = 16,
+            .checksum = 0
+        },
+        .address = reg_address,
+        .value = reg_value,
+        .mask = 0xFFFFFFFF,
+        .delay_us = 0
+    };
+    uint8_t delimiter_2 = 0xc0;
+};
+
+map<target_chip_t, uint32_t> chip_magic_value = {
+    {ESP8266_CHIP,  0xfff0c101},
+    {ESP32_CHIP,    0x00f01d83},
+    {ESP32S2_CHIP,  0x000007c6},
+    {ESP32C2_CHIP,  0x6f51306f},
+    {ESP32C3_CHIP,  0x6921506f},
+    {ESP32S3_CHIP,  0x00000009},
+    {ESP32H4_CHIP,  0xca26cc22},
+    {ESP32H2_CHIP,  0xd7b73e80},
+    {ESP32C6_CHIP,  0x2ce0806f},
+};
+
+void queue_connect_response(target_chip_t target = ESP32_CHIP, uint32_t magic_value = 0)
+{
+    // Set magic value register used for detection of attached chip
+    auto magic_value_response = read_reg_response;
+    magic_value_response.data.common.value = magic_value ? magic_value : chip_magic_value[target];
+    clear_buffers();
+    queue_response(sync_response);
+    queue_response(magic_value_response);
+
+    if (target == ESP8266_CHIP) {
+        queue_response(flash_begin_response);
+    } else {
+        auto efuse_pin_config_reg_1 = read_reg_response;
+        auto efuse_pin_config_reg_2 = read_reg_response;
+
+        queue_response(efuse_pin_config_reg_1);
+        queue_response(efuse_pin_config_reg_2);
+        queue_response(attach_response);
+    }
+
+}
+
+TEST_CASE( "chip_magic_value contains all supported chips " )
+{
+    REQUIRE( chip_magic_value.size() ==  ESP_MAX_CHIP );
+}
+
+TEST_CASE( "Can connect within specified time " )
+{
+    queue_connect_response();
+
+    esp_loader_connect_args_t connect_config = {
+        .sync_timeout = 10,
+        .trials = 1
+    };
+
+    SECTION( "Can connect" ) {
+        serial_set_time_delay(5);
+        REQUIRE_SUCCESS( esp_loader_connect(&connect_config) );
+    }
+
+    SECTION( "Timeout error is returned when timeout expires" ) {
+        serial_set_time_delay(20);
+        REQUIRE ( esp_loader_connect(&connect_config) == ESP_LOADER_ERROR_TIMEOUT );
+    }
+
+    SECTION( "Can connect after several trials within specified time" ) {
+        connect_config.trials = 5;
+        serial_set_time_delay(40);
+        REQUIRE_SUCCESS( esp_loader_connect(&connect_config) );
+
+        serial_set_time_delay(60);
+        REQUIRE( esp_loader_connect(&connect_config) == ESP_LOADER_ERROR_TIMEOUT );
+    }
+
+    serial_set_time_delay(0);
+}
+
+
+TEST_CASE( "Can detect attached target" )
+{
+    esp_loader_connect_args_t connect_config = ESP_LOADER_CONNECT_DEFAULT();
+
+    SECTION( "Can detect ESP32" ) {
+        queue_connect_response(ESP32_CHIP);
+        REQUIRE_SUCCESS( esp_loader_connect(&connect_config) );
+        REQUIRE( esp_loader_get_target() == ESP32_CHIP );
+    }
+
+    SECTION( "Can detect ESP32S2" ) {
+        queue_connect_response(ESP32S2_CHIP);
+        REQUIRE_SUCCESS( esp_loader_connect(&connect_config) );
+        REQUIRE( esp_loader_get_target() == ESP32S2_CHIP );
+    }
+
+    SECTION( "Can detect ESP32C2" ) {
+        queue_connect_response(ESP32C2_CHIP);
+        REQUIRE_SUCCESS( esp_loader_connect(&connect_config) );
+        REQUIRE( esp_loader_get_target() == ESP32C2_CHIP );
+    }
+
+    SECTION( "Can detect ESP32H4" ) {
+        queue_connect_response(ESP32H4_CHIP);
+        REQUIRE_SUCCESS( esp_loader_connect(&connect_config) );
+        REQUIRE( esp_loader_get_target() == ESP32H4_CHIP );
+    }
+
+    SECTION( "Can detect ESP32H2" ) {
+        queue_connect_response(ESP32H2_CHIP);
+        REQUIRE_SUCCESS( esp_loader_connect(&connect_config) );
+        REQUIRE( esp_loader_get_target() == ESP32H2_CHIP );
+    }
+
+    SECTION( "Can detect ESP32C3" ) {
+        queue_connect_response(ESP32C3_CHIP);
+        REQUIRE_SUCCESS( esp_loader_connect(&connect_config) );
+        REQUIRE( esp_loader_get_target() == ESP32C3_CHIP );
+    }
+
+    SECTION( "Can detect ESP32C3 rev3" ) {
+        queue_connect_response(ESP32C3_CHIP, 0x1b31506f);
+        REQUIRE_SUCCESS( esp_loader_connect(&connect_config) );
+        REQUIRE( esp_loader_get_target() == ESP32C3_CHIP );
+    }
+
+    SECTION( "Can detect ESP32S3" ) {
+        queue_connect_response(ESP32S3_CHIP);
+        REQUIRE_SUCCESS( esp_loader_connect(&connect_config) );
+        REQUIRE( esp_loader_get_target() == ESP32S3_CHIP );
+    }
+
+    SECTION( "Can detect ESP8266" ) {
+        queue_connect_response(ESP8266_CHIP);
+        REQUIRE_SUCCESS( esp_loader_connect(&connect_config) );
+        REQUIRE( esp_loader_get_target() == ESP8266_CHIP );
+    }
+
+    SECTION( "Can detect unknown chip" ) {
+        queue_connect_response(ESP_UNKNOWN_CHIP, 0xaaaaaaaa);
+        REQUIRE( esp_loader_connect(&connect_config) == ESP_LOADER_ERROR_INVALID_TARGET);
+    }
+}
+
+TEST_CASE( "Register can be read correctly" )
+{
+    clear_buffers();
+    uint32_t reg_value = 0;
+    read_reg_response.data.common.value = 55;
+
+    queue_response(read_reg_response);
+
+    REQUIRE_SUCCESS( esp_loader_read_register(0, &reg_value) );
+
+    REQUIRE( reg_value == 55 );
+}
+
+
+TEST_CASE( "Register can be written correctly" )
+{
+    write_reg_cmd_response expected;
+    write_reg_response.data.common.value = 55;
+
+    clear_buffers();
+    queue_response(write_reg_response);
+
+    REQUIRE_SUCCESS( esp_loader_write_register(reg_address, reg_value) );
+
+    REQUIRE( memcmp(write_buffer_data(), &expected, sizeof(expected)) == 0 );
+}
+
+// --------------------  Serial comm test  -----------------------
+
+TEST_CASE ( "SLIP is encoded correctly" )
+{
+    loader_flash_begin_cmd(0, 0, 0, 0, ESP32_CHIP); // To reset sequence number counter
+
+    uint8_t data[] = { TEST_SLIP_PACKET };
+
+    uint8_t expected[] = {
+        0xc0,       // Begin
+        0x00,         // Write direction
+        0x03,         // FLASH_DATA command
+        16 + sizeof(data), 0, // Number of characters to send
+        0x33, 0, 0, 0,// Checksum
+        sizeof(data), 0, 0, 0, // Data size
+        0, 0, 0, 0,   // Sequence number
+        0, 0, 0, 0,   // zero
+        0, 0, 0, 0,   // zero
+        SLIP_ENCODED_PACKET,
+        0xc0,       // End
+    };
+
+    // write_buffer_print();
+    // print_array(expected, sizeof(expected));
+
+    clear_buffers();
+    queue_response(flash_data_response);
+
+    REQUIRE_SUCCESS( loader_flash_data_cmd(data, sizeof(data)) );
+
+    REQUIRE( memcmp(write_buffer_data(), expected, sizeof(expected)) == 0 );
+}
+
+
+TEST_CASE( "Sync command is constructed correctly" )
+{
+    uint8_t expected[] = {
+        0xc0,         // Begin
+        0x00,         // Write direction
+        0x08,         // SYNC command
+        36, 0,        // Number of characters to send
+        0, 0, 0, 0,   // Checksum is ignored for this command
+        0x07, 0x07, 0x12, 0x20,
+        0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55,
+        0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55,
+        0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55,
+        0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55,
+        0xc0,         // End
+    };
+
+    clear_buffers();
+    queue_response(sync_response);
+
+    REQUIRE_SUCCESS( loader_sync_cmd() );
+
+    REQUIRE( memcmp(write_buffer_data(), expected, sizeof(expected)) == 0 );
+}
+
+TEST_CASE( "Register can be read and decoded correctly" )
+{
+    clear_buffers();
+    read_reg_response.data.common.value = 55;
+    queue_response(read_reg_response);
+
+    uint32_t reg_value = 0;
+    esp_loader_read_register(0, &reg_value);
+
+    REQUIRE( reg_value == 55 );
+}
+
+TEST_CASE( "Received response (in SLIP format) is decoded correctly" )
+{
+    clear_buffers();
+    read_reg_response.data.common.value = 0xC0BD; // C0, BD has to be replaced
+    queue_response(read_reg_response);
+
+    uint32_t reg_value = 0;
+    esp_loader_read_register(0, &reg_value);
+
+    REQUIRE( reg_value == 0xC0BD );
+}
+
+
+// --------------------  Serial mock test  -----------------------
+
+TEST_CASE( "Serial read works correctly" )
+{
+    uint32_t reg_value = 5;
+    uint8_t readout[sizeof(reg_value) + 2];
+    uint8_t expected[] = { 0xc0, 5, 0, 0, 0, 0xc0 };
+
+    clear_buffers();
+
+    set_read_buffer(&reg_value, sizeof(reg_value));
+
+    SECTION( "Read buffer can be read" ) {
+        loader_port_read(readout, sizeof(readout), 0);
+        REQUIRE( memcmp(readout, expected, sizeof(readout)) == 0 );
+    }
+
+    SECTION ( "Read buffer can be read in smaller chunks" ) {
+        loader_port_read(&readout[0], 3, 0);
+        loader_port_read(&readout[3], 3, 0);
+        REQUIRE( memcmp(readout, expected, sizeof(readout)) == 0 );
+    }
+
+    SECTION ( "Timeout is returned when requested amount of data is not available" ) {
+        REQUIRE( loader_port_read(readout, sizeof(readout) + 1, 0) == ESP_LOADER_ERROR_TIMEOUT);
+    }
+
+    SECTION ( "Read buffer is correctly SLIP encoded " ) {
+        uint8_t data_to_encode[] = { TEST_SLIP_PACKET };
+        uint8_t expected[] = { 0xc0, SLIP_ENCODED_PACKET, 0xc0};
+        uint8_t encoded[sizeof(expected)];
+
+        clear_buffers();
+
+        fill(encoded, &encoded[sizeof(encoded)], 0);
+        set_read_buffer(data_to_encode, sizeof(data_to_encode));
+        loader_port_read(encoded, sizeof(encoded), 0);
+
+        REQUIRE( memcmp(expected, encoded, sizeof(expected)) == 0 );
+    }
+}

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/test/test_main.cpp

@@ -0,0 +1,40 @@
+/* Copyright 2018-2023 Espressif Systems (Shanghai) CO LTD
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+// #define CATCH_CONFIG_MAIN
+#define CATCH_CONFIG_RUNNER
+
+#include "catch.hpp"
+#include "esp_loader_io.h"
+#include "serial_io_mock.h"
+
+
+int main( int argc, char* argv[] ) {
+
+    const loader_serial_config_t dummy_config = { 0 };
+
+    // global setup...
+    if( loader_port_mock_init(&dummy_config) != ESP_LOADER_SUCCESS ) {
+        std::cout << "Serial initialization failed";
+        return 0;
+    }
+
+    int result = Catch::Session().run( argc, argv );
+
+    // global clean-up...
+    loader_port_mock_deinit();
+
+    return result;
+}

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/zephyr/CMakeLists.txt

@@ -0,0 +1,30 @@
+cmake_minimum_required(VERSION 3.5)
+
+if (CONFIG_ESP_SERIAL_FLASHER)
+    zephyr_include_directories(
+        "${ZEPHYR_CURRENT_MODULE_DIR}/include"
+        "${ZEPHYR_CURRENT_MODULE_DIR}/port"
+        "${ZEPHYR_CURRENT_MODULE_DIR}/private_include"
+    )
+
+    zephyr_interface_library_named(esp_flasher)
+
+    zephyr_library()
+
+    zephyr_library_sources(${ZEPHYR_CURRENT_MODULE_DIR}/src/esp_loader.c
+                ${ZEPHYR_CURRENT_MODULE_DIR}/src/esp_targets.c
+                ${ZEPHYR_CURRENT_MODULE_DIR}/src/protocol_common.c
+                ${ZEPHYR_CURRENT_MODULE_DIR}/src/protocol_uart.c
+                ${ZEPHYR_CURRENT_MODULE_DIR}/src/slip.c
+                ${ZEPHYR_CURRENT_MODULE_DIR}/src/md5_hash.c
+                ${ZEPHYR_CURRENT_MODULE_DIR}/port/zephyr_port.c
+    )
+
+    target_compile_definitions(esp_flasher INTERFACE SERIAL_FLASHER_INTERFACE_UART)
+
+    zephyr_library_link_libraries(esp_flasher)
+
+    if(DEFINED MD5_ENABLED OR CONFIG_SERIAL_FLASHER_MD5_ENABLED)
+        target_compile_definitions(esp_flasher INTERFACE -DMD5_ENABLED=1)
+    endif()
+endif()

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/zephyr/Kconfig

@@ -0,0 +1,16 @@
+config ESP_SERIAL_FLASHER
+    bool "Enable ESP serial flasher library"
+    default y
+    select CONSOLE_SUBSYS
+    help
+      Select this option to enable the ESP serial flasher library.
+
+config ESP_SERIAL_FLASHER_UART_BUFSIZE
+    int "ESP Serial Flasher UART buffer size"
+    default 512
+    help
+      Buffer size for UART TX and RX packets
+
+if ESP_SERIAL_FLASHER
+    rsource "../Kconfig"
+endif

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/lib/esp-serial-flasher/zephyr/module.yml

@@ -0,0 +1,5 @@
+name: esp-flasher
+
+build:
+  cmake: zephyr
+  kconfig: zephyr/Kconfig

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/platformio.ini

@@ -0,0 +1,71 @@
+[env]
+platform = espressif32
+framework = arduino
+lib_deps = 
+platform_packages = 
+board_build.filesystem = littlefs
+monitor_filters = esp32_exception_decoder
+monitor_speed = 115200
+board_build.f_cpu = 240000000L
+build_flags =
+	-D BUILD_ENV_NAME=$PIOENV
+	-D BUILD_TIME=$UNIX_TIME
+	-D USER_SETUP_LOADED
+	-D DISABLE_ALL_LIBRARY_WARNINGS
+	-D ILI9341_DRIVER
+	-D SMOOTH_FONT
+	-D SERIAL_FLASHER_RESET_HOLD_TIME_MS=100
+	-D SERIAL_FLASHER_BOOT_HOLD_TIME_MS=50
+	-D SERIAL_FLASHER_INTERFACE_UART
+	;-D SERIAL_FLASHER_DEBUG_TRACE
+
+upload_port = COM22
+monitor_port = COM22
+
+[env:ESP32_S3_16_8_YELLOW_AP]
+board = esp32-s3-devkitc-1
+board_build.partitions = large_spiffs_16MB.csv
+build_unflags =
+  -D ARDUINO_USB_MODE=1
+  -D CONFIG_MBEDTLS_INTERNAL_MEM_ALLOC=y
+  -D ILI9341_DRIVER
+build_flags = 
+	${env.build_flags}
+	-D YELLOW_IPS_AP
+	-D CORE_DEBUG_LEVEL=0
+	-D ARDUINO_USB_MODE=0
+	-D CONFIG_ESP32S3_SPIRAM_SUPPORT=1
+	-D CONFIG_SPIRAM_USE_MALLOC=1
+	-D POWER_NO_SOFT_POWER
+	-D BOARD_HAS_PSRAM
+	-D CONFIG_MBEDTLS_EXTERNAL_MEM_ALLOC=y
+	-D FLASHER_AP_SS=-1
+	-D FLASHER_AP_CLK=-1
+	-D FLASHER_AP_MOSI=-1
+	-D FLASHER_AP_MISO=-1
+	-D FLASHER_AP_RESET=47
+	-D FLASHER_AP_POWER={-1}
+	-D FLASHER_AP_TEST=-1
+	-D FLASHER_AP_TXD=17
+	-D FLASHER_AP_RXD=18
+	-D FLASHER_LED=14
+	-D ST7789_DRIVER
+	-D TFT_WIDTH=170
+	-D TFT_HEIGHT=320
+	-D TFT_MISO=-1
+	-D TFT_MOSI=13
+	-D TFT_SCLK=12
+	-D TFT_CS=10
+	-D TFT_DC=11
+	-D TFT_RST=1
+	-D TFT_RGB_ORDER=TFT_BGR
+	-D USE_HSPI_PORT
+	-D LOAD_FONT2
+build_src_filter = 
+   +<*>-<usbflasher.cpp>-<swd.cpp>
+board_build.flash_mode=qio
+board_build.arduino.memory_type = qio_opi
+board_build.psram_type=qspi_opi
+board_upload.maximum_size = 16777216
+board_upload.maximum_ram_size = 327680
+board_upload.flash_size = 16MB

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/src/main.cpp

@@ -0,0 +1,143 @@
+#include <Arduino.h>
+#include "esp32_port.h"
+#include "esp_loader.h"
+#include "example_common.h"
+#include "flash_files_c6.h"
+
+esp_loader_error_t connect_to_target1(uint32_t higher_transmission_rate)
+{
+    esp_loader_connect_args_t connect_config = ESP_LOADER_CONNECT_DEFAULT();
+
+    esp_loader_error_t err = esp_loader_connect(&connect_config);
+    if (err != ESP_LOADER_SUCCESS)
+    {
+        printf("Cannot connect to target. Error: %u\n", err);
+        return err;
+    }
+    printf("Connected to target\n");
+
+    if (higher_transmission_rate && esp_loader_get_target() != ESP8266_CHIP)
+    {
+        err = esp_loader_change_transmission_rate(higher_transmission_rate);
+        if (err == ESP_LOADER_ERROR_UNSUPPORTED_FUNC)
+        {
+            printf("ESP8266 does not support change transmission rate command.");
+            return err;
+        }
+        else if (err != ESP_LOADER_SUCCESS)
+        {
+            printf("Unable to change transmission rate on target.");
+            return err;
+        }
+        else
+        {
+            err = loader_port_change_transmission_rate(higher_transmission_rate);
+            if (err != ESP_LOADER_SUCCESS)
+            {
+                printf("Unable to change transmission rate.");
+                return err;
+            }
+            printf("Transmission rate changed changed\n");
+        }
+    }
+    return ESP_LOADER_SUCCESS;
+}
+
+#define MAX(a, b) ((a) > (b) ? (a) : (b))
+#define MIN(a, b) ((a) < (b) ? (a) : (b))
+esp_loader_error_t flash_binary1(const uint8_t *bin, size_t size, size_t address)
+{
+    esp_loader_error_t err;
+    static uint8_t payload[1024];
+    const uint8_t *bin_addr = bin;
+
+    printf("Erasing flash (this may take a while)...\n");
+    err = esp_loader_flash_start(address, size, sizeof(payload));
+    if (err != ESP_LOADER_SUCCESS)
+    {
+        printf("Erasing flash failed with error %d.\n", err);
+        return err;
+    }
+    printf("Start programming\n");
+
+    size_t binary_size = size;
+    size_t written = 0;
+
+    while (size > 0)
+    {
+        size_t to_read = MIN(size, sizeof(payload));
+        memcpy(payload, bin_addr, to_read);
+
+        err = esp_loader_flash_write(payload, to_read);
+        if (err != ESP_LOADER_SUCCESS)
+        {
+            printf("\nPacket could not be written! Error %d.\n", err);
+            return err;
+        }
+
+        size -= to_read;
+        bin_addr += to_read;
+        written += to_read;
+
+        int progress = (int)(((float)written / binary_size) * 100);
+        printf("\rProgress: %d %%", progress);
+        fflush(stdout);
+    };
+
+    printf("\nFinished programming\n");
+
+#if MD5_ENABLED
+    err = esp_loader_flash_verify();
+    if (err == ESP_LOADER_ERROR_UNSUPPORTED_FUNC)
+    {
+        printf("ESP8266 does not support flash verify command.");
+        return err;
+    }
+    else if (err != ESP_LOADER_SUCCESS)
+    {
+        printf("MD5 does not match. err: %d\n", err);
+        return err;
+    }
+    printf("Flash verified\n");
+#endif
+
+    return ESP_LOADER_SUCCESS;
+}
+
+void setup()
+{
+    pinMode(17, INPUT_PULLUP);
+    pinMode(18, INPUT_PULLUP);
+    Serial.begin(115200);
+    delay(1000);
+    Serial.println("ESP_Flasher_hi");
+
+    const loader_esp32_config_t config = {
+        .baud_rate = 115200,
+        .uart_port = 2,
+        .uart_rx_pin = GPIO_NUM_19,
+        .uart_tx_pin = GPIO_NUM_20,
+        .reset_trigger_pin = GPIO_NUM_47,
+        .gpio0_trigger_pin = GPIO_NUM_21,
+    };
+
+    Serial.printf("serial initialization: %i \r\n", loader_port_esp32_init(&config));
+
+    if (connect_to_target1(230400) == ESP_LOADER_SUCCESS)
+    {
+    Serial.printf("We got the following ESP: %i\r\n", esp_loader_get_target());
+        Serial.println("Loading bootloader...");
+        flash_binary1(data_bootloader, sizeof(data_bootloader), 0x0);
+        Serial.println("Loading partition table...");
+        flash_binary1(data_table, sizeof(data_table), 0x8000);
+        Serial.println("Loading app...");
+        flash_binary1(data_application, sizeof(data_application), 0x10000);
+        Serial.println("Done!");
+    }
+}
+
+void loop()
+{
+    Serial.printf("MS: %u\r\n", millis());
+    delay(1000);
+}

ARM_Tag_FW/ESP32_S3_to_C6_Flasher_Test/test/README

@@ -0,0 +1,11 @@
+
+This directory is intended for PlatformIO Test Runner and project tests.
+
+Unit Testing is a software testing method by which individual units of
+source code, sets of one or more MCU program modules together with associated
+control data, usage procedures, and operating procedures, are tested to
+determine whether they are fit for use. Unit testing finds problems early
+in the development cycle.
+
+More information about PlatformIO Unit Testing:
+- https://docs.platformio.org/en/latest/advanced/unit-testing/index.html