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CC1310 Based Chroma Tags

Skip Hansen edited this page 2025-12-12 06:41:03 -08:00

Table of Contents

• CC1310F64RHB
• Pin connections
• Known Chroma Tags tags based on the CC1310F64RHB SOC

CC1310F64RHB

• 48 Mhz Arm® Cortex®-M3 Processor
• 64KB Flash
• 8KB of SRAM for Cache (or as General-Purpose RAM)
• 20KB of Ultra-Low-Leakage SRAM
• 2-Pin cJTAG and JTAG Debugging
• SubGhz (868 Mhz / 915 Mhz) Radio

Pin connections

Pin	Pin name	Usage	Notes
1	RF_P	antenna matching network	note 1
2	RF_N	antenna matching network	note 1
3	RX_TX	External LNA bias	note 1
4	X32K_Q1	32786 Crystal
5	X32K_Q2	32786 Crystal
6	DIO_0	EPD_PWR
7	DIO_1	EPD_BUSY	EPD pin 9
8	DIO_2	EPD_CS	EPD pin 12
9	DIO_3	EPD_SCLK	EPD pin 13
10	DIO_4	EPD_SDI	EPD pin 14
11	VDDS2	VDD
12	DCOUPL	Cap
13	JTAG_TMSC	cJTAG Data	TP3
14	JTAG_TCKC	cJTAG Clock	TP5
15	DIO_5	EPD_RST	EPD pin 10
16	DIO_6	UART RX (Serial in Chroma <- PC)	TP9
17	DCDC_SW
18	VDDS_DCDC	VDD
19	RESET_N	Reset	TP2
20	DIO_7	UART TX (Serial out Chroma -> PC)	TP7
21	DIO_8	SPI_FLASH_MOSI	SPI flash pin 5
22	DIO_9	SPI_FLASH_CLK	SPI flash pin 6
23	DIO_10	SPI_FLASH_MISO	SPI flash pin 2
24	DIO_11	SPI_FLASH_CS	SPI flash pin 1
25	DIO_12	n/c ?
26	DIO_13	n/c ?
27	DIO_14	n/c ?
28	VDDS	VDD
30	X24M_N	24 Mhz crystal
31	X24M_P	24 Mhz crystal
29	VDDR	VDD
32	VDDR_RF	VDD

Notes:

1. i.e. "External Bias, Differential mode.

Known Chroma Tags tags based on the CC1310F64RHB SOC

Tag	Compatible EPD displays	Note
Chroma 21, SN starting with 'MJ'
Chroma 29, SN starting with 'ME'	EP_CHROMA29_CC1310
Chroma 74H, SN starting with 'MS'	waveshare 7.5 800x480 B/W/R EP75R_800x480	1

Notes:

1. The partial window opcodes 0x91 and 0x92 do not appear to be supported, bit compatible otherwise.